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Searched refs:CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2089 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h3210 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3824 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4346 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT 0x10 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1326 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_1_sh_mask.h1225 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1192 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1242 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1825 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6812 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7078 #define CP_CE_ROQ_IB2_STAT__CEQ_WPTR_INDIRECT2__SHIFT … macro