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Searched refs:CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4123 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK 0x40000000 macro
H A Dgfx_8_1_sh_mask.h4645 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK 0x40000000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13106 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_9_1_sh_mask.h14410 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_9_2_1_sh_mask.h14275 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_9_4_3_sh_mask.h16642 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_9_4_2_sh_mask.h4208 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_11_0_0_sh_mask.h17653 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_10_1_0_sh_mask.h20533 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_11_0_3_sh_mask.h19898 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro
H A Dgc_10_3_0_sh_mask.h18686 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR_MASK … macro