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Searched refs:CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3324 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT 0x2 macro
H A Dgfx_8_0_sh_mask.h3932 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h4454 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT 0x2 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12865 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_9_1_sh_mask.h14169 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_9_2_1_sh_mask.h14034 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_9_4_3_sh_mask.h16397 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_9_4_2_sh_mask.h3965 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_11_0_0_sh_mask.h17346 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_10_1_0_sh_mask.h20280 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_11_0_3_sh_mask.h19585 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro
H A Dgc_10_3_0_sh_mask.h18435 #define CP_HQD_PQ_WPTR_POLL_ADDR__WPTR_ADDR__SHIFT macro