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Searched refs:CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h15391 #define CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17922 #define CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17546 #define CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16186 #define CP_INT_CNTL_RING0__DMA_WATCH_INT_ENABLE__SHIFT … macro