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Searched refs:CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2377 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x00000016 macro
H A Dgfx_7_2_sh_mask.h1180 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
H A Dgfx_8_0_sh_mask.h1508 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
H A Dgfx_8_1_sh_mask.h2032 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10989 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12470 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12274 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h13999 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2290 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15400 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17931 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17555 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16195 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro