/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 4578 MVT CmpVT = N0.getSimpleValueType(); in tryVPTESTM() local 4579 MVT CmpSVT = CmpVT.getVectorElementType(); in tryVPTESTM() 4657 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM() 4659 unsigned NumElts = CmpVT.getVectorNumElements() * Scale; in tryVPTESTM() 4660 CmpVT = MVT::getVectorVT(CmpSVT, NumElts); in tryVPTESTM() 5543 MVT CmpVT = N0.getSimpleValueType(); in Select() local 5552 switch (CmpVT.SimpleTy) { in Select() 5610 MVT CmpVT = N0.getSimpleValueType(); in Select() local 5730 (!(Mask & 0x80) || CmpVT == MVT::i8 || in Select() 5738 (!(Mask & 0x8000) || CmpVT == MVT::i16 || in Select() [all …]
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H A D | X86FastISel.cpp | 2074 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitCMoveSelect() local 2076 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitCMoveSelect() 2309 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitPseudoSelect() local 2310 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitPseudoSelect()
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H A D | X86ISelLowering.cpp | 24198 assert((CmpVT == MVT::i8 || CmpVT == MVT::i16 || in EmitCmp() 24199 CmpVT == MVT::i32 || CmpVT == MVT::i64) && "Unexpected VT!"); in EmitCmp() 24224 CmpVT = MVT::i32; in EmitCmp() 24236 CmpVT = MVT::i32; in EmitCmp() 44026 if (EVT(CmpVT) == VT) in combineBitcast() 53243 if (VecVT != CmpVT) in emitOrXorXorTree() 53252 if (VecVT != CmpVT) in emitOrXorXorTree() 53327 CmpVT = MVT::v64i1; in combineVectorSizedSetCCEquality() 53332 CmpVT = MVT::v16i1; in combineVectorSizedSetCCEquality() 53375 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 6720 EVT CmpVT; in LowerVSETCC() local 6722 CmpVT = Op0.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC() 6735 CmpVT = VT; in LowerVSETCC() 6742 unsigned CmpElements = CmpVT.getVectorNumElements() * 2; in LowerVSETCC() 6750 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC() 6752 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC() 6757 if (CmpVT.getVectorElementType() == MVT::i64) in LowerVSETCC() 6788 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC() 6790 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC() 6873 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, Op0, in LowerVSETCC() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 13161 CmpVT = MVT::v4i32; in LowerVSETCC() 13177 EmitVectorComparison(LHS, RHS, CC1, NoNaNs, CmpVT, dl, DAG); in LowerVSETCC() 13187 Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); in LowerVSETCC() 17102 EVT CmpVT = InfoAndKind.IsAArch64 in performSetccAddFolding() local 17105 if (CmpVT != MVT::i32 && CmpVT != MVT::i64) in performSetccAddFolding() 17835 EVT CmpVT = N->getOperand(2).getValueType(); in tryConvertSVEWideCompare() local 17880 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, DL, CmpVT, Imm); in tryConvertSVEWideCompare() 20607 EVT CmpVT = N0.getOperand(0).getValueType(); in performVSelectCombine() local 20610 if (ResVT.getSizeInBits() != CmpVT.getSizeInBits()) in performVSelectCombine() 23494 EVT CmpVT = Pg.getValueType(); in LowerFixedLengthVectorSetccToSVE() local [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 7904 EVT CmpVT = Op.getOperand(0).getValueType(); in LowerSELECT_CC() local 7912 if (!Subtarget.hasP9Vector() && CmpVT == MVT::f128) { in LowerSELECT_CC() 7914 dl, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT), in LowerSELECT_CC() 7921 if (!CmpVT.isFloatingPoint() || !TV.getValueType().isFloatingPoint() || in LowerSELECT_CC() 7995 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 8005 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 8011 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 8017 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC() 8023 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 4937 EVT CmpVT = LHS.getValueType(); in lowerICMPIntrinsic() local 4938 if (CmpVT == MVT::i16 && !TLI.isTypeLegal(MVT::i16)) { in lowerICMPIntrinsic() 4968 EVT CmpVT = Src0.getValueType(); in lowerFCMPIntrinsic() local 4971 if (CmpVT == MVT::f16 && !TLI.isTypeLegal(CmpVT)) { in lowerFCMPIntrinsic()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 3731 EVT CmpVT = Tmp1.getValueType(); in ExpandNode() local 3735 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode()
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H A D | SelectionDAGBuilder.cpp | 8160 EVT CmpVT = EVT::getIntegerVT(LHS->getContext(), LoadVT.getSizeInBits()); in visitMemCmpBCmpCall() local 8161 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall() 8162 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 4109 EVT CmpVT = Tmp1.getValueType(); in LowerOperation() local 4111 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT); in LowerOperation()
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