/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 833 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, in buildAtomicCmpXchgWithSuccess() argument 839 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchgWithSuccess() 854 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess() 861 Register CmpVal, Register NewVal, in buildAtomicCmpXchg() argument 866 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchg() 879 .addUse(CmpVal) in buildAtomicCmpXchg()
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H A D | LegalizerHelper.cpp | 3363 Register CmpVal = MI.getOperand(3).getReg(); in lower() local 3365 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, in lower() 3367 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal); in lower()
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/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2547 if (CmpVal == 0) { in getTestUnderMaskCond() 2553 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { in getTestUnderMaskCond() 2567 if (CmpVal == Mask) { in getTestUnderMaskCond() 2573 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { in getTestUnderMaskCond() 2579 if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) { in getTestUnderMaskCond() 2587 if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) { in getTestUnderMaskCond() 2593 if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) { in getTestUnderMaskCond() 2652 CmpVal += 1; in adjustForTestUnderMask() 2657 MaskVal = -(CmpVal & -CmpVal); in adjustForTestUnderMask() 2671 ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal && in adjustForTestUnderMask() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.h | 156 Value *AlignedAddr, Value *CmpVal,
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H A D | LoongArchISelLowering.cpp | 2824 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument 2830 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic() 2837 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 1242 Register Addr, Register CmpVal, Register NewVal, 1260 Register CmpVal, Register NewVal,
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 560 Value *AlignedAddr, Value *CmpVal,
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H A D | RISCVISelLowering.cpp | 13903 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument 13908 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic() 13917 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 2706 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg() local 2712 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg() 2715 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg() 4714 Register CmpVal; in legalizeBufferAtomic() local 4717 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic() 4752 MIB.addReg(CmpVal); in legalizeBufferAtomic()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 935 Value *AlignedAddr, Value *CmpVal,
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H A D | PPCISelLowering.cpp | 18414 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument 18417 Type *ValTy = CmpVal->getType(); in emitMaskedAtomicCmpXchgIntrinsic() 18422 Value *CmpLo = Builder.CreateTrunc(CmpVal, Int64Ty, "cmp_lo"); in emitMaskedAtomicCmpXchgIntrinsic() 18424 Builder.CreateTrunc(Builder.CreateLShr(CmpVal, 64), Int64Ty, "cmp_hi"); in emitMaskedAtomicCmpXchgIntrinsic()
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 454 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; in LowerFPToInt() local 495 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal))); in LowerFPToInt()
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 2051 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1914 Register CmpVal = MI.getOperand(2).getReg(); in emitAtomicCmpSwapPartword() local 1992 .addReg(CmpVal).addImm(MaskImm); in emitAtomicCmpSwapPartword()
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/openbsd/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 4686 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); in foldICmpEquality() local 4687 return new ICmpInst(NewPred, Xor, ConstantInt::get(A->getType(), CmpVal)); in foldICmpEquality()
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 6147 static bool isUndefOrEqual(int Val, int CmpVal) { in isUndefOrEqual() argument 6148 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); in isUndefOrEqual() 6153 static bool isUndefOrEqual(ArrayRef<int> Mask, int CmpVal) { in isUndefOrEqual() argument 6154 return llvm::all_of(Mask, [CmpVal](int M) { in isUndefOrEqual() 6155 return (M == SM_SentinelUndef) || (M == CmpVal); in isUndefOrEqual() 46760 const APInt &CmpVal = CmpConstant->getAPIntValue(); in combineSetCCMOVMSK() local 46764 assert(CmpBits == CmpVal.getBitWidth() && "Value size mismatch"); in combineSetCCMOVMSK() 46781 bool IsAnyOf = CmpOpcode == X86ISD::CMP && CmpVal.isZero(); in combineSetCCMOVMSK() 46783 NumElts <= CmpBits && CmpVal.isMask(NumElts); in combineSetCCMOVMSK()
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