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Searched refs:DAGB0_WR_CNTL__SCLK_FREQ_MASK (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_sh_mask.h1234 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_2_3_0_sh_mask.h1792 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_9_1_sh_mask.h1812 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_1_0_sh_mask.h1072 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h1072 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_1_8_0_sh_mask.h1091 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_1_7_sh_mask.h1103 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro
H A Dmmhub_9_4_1_sh_mask.h1074 #define DAGB0_WR_CNTL__SCLK_FREQ_MASK … macro