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Searched refs:DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h4921 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK 0x8000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16884 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_9_1_sh_mask.h18193 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h18068 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h20194 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h10315 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h22085 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h24378 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h24415 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h22567 #define DB_SHADER_CONTROL__DUAL_QUAD_DISABLE_MASK … macro