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Searched refs:DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_sh_mask.h1770 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT 0x2 macro
H A Ddce_12_0_sh_mask.h2426 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h421 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_1_0_sh_mask.h1854 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h358 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h746 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h650 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h157 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h8060 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h1176 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h471 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h476 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h457 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE__SHIFT … macro