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Searched refs:DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_V_UPDATE (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h426 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_V_UPDATE = 0x8, enumerator
H A Ddce_11_2_enum.h1598 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_V_UPDATE = 0x8, enumerator
/openbsd/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h12217 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_V_UPDATE = 0x00000008, enumerator