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Searched refs:DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4308 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT 0x00000018 macro
H A Ddce_8_0_sh_mask.h6706 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT 0x18 macro
H A Ddce_10_0_sh_mask.h15989 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT 0x18 macro
H A Ddce_11_0_sh_mask.h16209 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT 0x18 macro
H A Ddce_11_2_sh_mask.h16959 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT 0x18 macro
H A Ddce_12_0_sh_mask.h7627 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h27045 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h32965 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h26814 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h39298 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h43879 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h41981 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h34969 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h44938 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h30992 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h36305 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h35370 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h39295 #define DC_I2C_DDC4_SETUP__DC_I2C_DDC4_TIME_LIMIT__SHIFT … macro