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Searched refs:DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK (Results 1 – 20 of 20) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4501 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK 0x00000003L macro
H A Ddce_8_0_sh_mask.h6503 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK 0x3 macro
H A Ddce_10_0_sh_mask.h15778 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK 0x3 macro
H A Ddce_11_0_sh_mask.h15998 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK 0x3 macro
H A Ddce_11_2_sh_mask.h16748 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK 0x3 macro
H A Ddce_12_0_sh_mask.h7423 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15812 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_0_3_sh_mask.h16227 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_1_0_sh_mask.h26841 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_2_1_0_sh_mask.h32769 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_0_1_sh_mask.h26633 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39102 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_1_2_sh_mask.h43683 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_1_5_sh_mask.h41785 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_1_4_sh_mask.h34773 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_1_6_sh_mask.h44742 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_0_2_sh_mask.h30796 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_2_0_0_sh_mask.h36094 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_0_0_sh_mask.h35159 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro
H A Ddcn_3_2_0_sh_mask.h39099 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS_MASK … macro