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Searched refs:DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT (Results 1 – 20 of 20) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4502 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h6504 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h15779 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h15999 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h16749 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h7411 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15800 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h16215 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_1_0_sh_mask.h26829 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h32757 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h26621 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h39090 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h43671 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h41773 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h34761 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h44730 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h30784 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h36082 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h35147 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h39087 #define DC_I2C_SW_STATUS__DC_I2C_SW_STATUS__SHIFT … macro