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Searched refs:DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1217 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_1_0_sh_mask.h2799 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h1245 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h1649 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h1695 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h1206 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h9929 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h2262 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h1407 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h1445 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h1446 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h767 #define DC_PERFMON1_PERFMON_CVALUE_INT_MISC__PERFCOUNTER_INT0_STATUS__SHIFT … macro