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Searched refs:DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_sh_mask.h17189 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_7_4_sh_mask.h25619 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_4_3_0_sh_mask.h55959 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_2_3_sh_mask.h20155 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_7_0_sh_mask.h37296 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_6_1_sh_mask.h22591 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro
H A Dnbio_7_2_0_sh_mask.h48883 #define DEV0_PF0_FLR_RST_CTRL__VF_PRV_EN_MASK … macro