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Searched refs:DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h3917 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_sh_mask.h17212 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_7_4_sh_mask.h25642 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h55982 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_2_3_sh_mask.h20178 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_7_0_sh_mask.h37319 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_6_1_sh_mask.h22614 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_7_7_0_sh_mask.h45665 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h48906 #define DEV0_PF1_FLR_RST_CTRL__FLR_DMA_DUMMY_RSPSTS__SHIFT … macro