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Searched refs:DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_powertune.c145 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ…
287 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ…
429 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ…
571 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ…
752 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ…
H A Dvega10_powertune.c207 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK, DIDT_SQ_CTRL0__DIDT_CTR…
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h18273 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h20491 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h21093 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK 0x10 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28749 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro
H A Dgc_9_1_sh_mask.h29969 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro
H A Dgc_9_2_1_sh_mask.h30292 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro
H A Dgc_9_4_2_sh_mask.h44 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro
H A Dgc_10_1_0_sh_mask.h43085 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro
H A Dgc_10_3_0_sh_mask.h48298 #define DIDT_SQ_CTRL0__DIDT_CTRL_RST_MASK … macro