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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK (Results 1 – 16 of 16) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5805 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK 0x08000000L macro
H A Ddce_8_0_sh_mask.h7963 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK 0x8000000 macro
H A Ddce_10_0_sh_mask.h6991 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK 0x8000000 macro
H A Ddce_11_0_sh_mask.h6893 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK 0x8000000 macro
H A Ddce_11_2_sh_mask.h7965 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK 0x8000000 macro
H A Ddce_12_0_sh_mask.h4915 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1537 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_1_0_sh_mask.h3877 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2383 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2524 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_2_sh_mask.h2008 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10638 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2575 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2454 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2651 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2521 #define DMCU_INTERRUPT_STATUS__VBLANK4_INT_OCCURRED_MASK … macro