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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK (Results 1 – 16 of 16) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5811 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK 0x20000000L macro
H A Ddce_8_0_sh_mask.h7973 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK 0x20000000 macro
H A Ddce_10_0_sh_mask.h7001 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK 0x20000000 macro
H A Ddce_11_0_sh_mask.h6903 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK 0x20000000 macro
H A Ddce_11_2_sh_mask.h7975 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK 0x20000000 macro
H A Ddce_12_0_sh_mask.h4920 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1542 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_1_0_sh_mask.h3882 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2388 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2529 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_1_2_sh_mask.h2013 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10643 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2580 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2459 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2656 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2526 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_CLEAR_MASK … macro