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Searched refs:DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK (Results 1 – 17 of 17) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5959 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h7739 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h6783 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h6679 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h7759 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h4697 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1375 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_1_0_sh_mask.h3667 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2173 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2318 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1798 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1309 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10428 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2365 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2244 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2441 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2311 #define DMCU_RAM_ACCESS_CTRL__ERAM_WR_ADDR_AUTO_INC_MASK … macro