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Searched refs:DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK (Results 1 – 17 of 17) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6017 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK 0x00000002L macro
H A Ddce_8_0_sh_mask.h7785 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK 0x2 macro
H A Ddce_10_0_sh_mask.h6829 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK 0x2 macro
H A Ddce_11_0_sh_mask.h6723 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK 0x2 macro
H A Ddce_11_2_sh_mask.h7803 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK 0x2 macro
H A Ddce_12_0_sh_mask.h4760 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1438 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_1_0_sh_mask.h3730 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2236 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2377 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1861 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1372 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10491 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2428 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2307 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2504 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2374 #define DMCU_UC_INTERNAL_INT_STATUS__UC_INT_XIRQ_N_PIN_MASK … macro