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Searched refs:DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h34049 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h39646 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h33566 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h31292 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h36183 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h34163 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h42555 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h37067 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h38324 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h43594 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h43117 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h31289 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h40495 #define DP2_DP_MSE_SAT1__DP_MSE_SAT_SRC2__SHIFT … macro