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Searched refs:DP5_DP_SEC_CNTL__DP_SEC_GSP3_ENABLE_MASK (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h38027 #define DP5_DP_SEC_CNTL__DP_SEC_GSP3_ENABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48094 #define DP5_DP_SEC_CNTL__DP_SEC_GSP3_ENABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h48331 #define DP5_DP_SEC_CNTL__DP_SEC_GSP3_ENABLE_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h43815 #define DP5_DP_SEC_CNTL__DP_SEC_GSP3_ENABLE_MASK … macro