Home
last modified time | relevance | path

Searched refs:DPCSSYS_CR1_LANE3_ANA_TX_MISC1__vref_sel_reg__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h32463 #define DPCSSYS_CR1_LANE3_ANA_TX_MISC1__vref_sel_reg__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h32617 #define DPCSSYS_CR1_LANE3_ANA_TX_MISC1__vref_sel_reg__SHIFT … macro