Home
last modified time | relevance | path

Searched refs:DPCSSYS_CR3_RAWAONLANE1_DIG_RX_IQ_PHASE_ADJUST__data__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h77140 #define DPCSSYS_CR3_RAWAONLANE1_DIG_RX_IQ_PHASE_ADJUST__data__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h77338 #define DPCSSYS_CR3_RAWAONLANE1_DIG_RX_IQ_PHASE_ADJUST__data__SHIFT … macro