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Searched refs:DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h2954 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US= 0x3, enumerator
H A Ddce_11_2_enum.h3391 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US= 0x3, enumerator
/openbsd/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h9059 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US = 0x00000003, enumerator
H A Dnavi10_enum.h7566 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US = 0x00000003, enumerator
H A Dsoc21_enum.h7814 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__600US = 0x00000003, enumerator