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Searched refs:DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6488 #define DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h9384 #define DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h8860 #define DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h8554 #define DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT 0x8 macro
H A Ddce_11_2_sh_mask.h9816 #define DP_MSE_MISC_CNTL__DP_MSE_ZERO_ENCODER__SHIFT 0x8 macro