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Searched refs:DSCCLK0_DTO_PARAM (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h61 SR(DSCCLK0_DTO_PARAM),\
130 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
131 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
H A Ddcn31_dccg.c365 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg31_disable_dscclk()
407 REG_UPDATE_2(DSCCLK0_DTO_PARAM, in dccg31_enable_dscclk()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h68 SR(DSCCLK0_DTO_PARAM),\
147 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
148 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h282 uint32_t DSCCLK0_DTO_PARAM; member