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Searched refs:DWB_OGAM_RAMA_END_CNTL1_G (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_dwb.h79 SR(DWB_OGAM_RAMA_END_CNTL1_G),\
238 SF_DWB2(DWB_OGAM_RAMA_END_CNTL1_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_END_BASE_G, mask_sh),\
784 uint32_t DWB_OGAM_RAMA_END_CNTL1_G; member
H A Ddcn30_dwb_cm.c100 gam_regs.start_end_cntl1_g = REG(DWB_OGAM_RAMA_END_CNTL1_G); in dwb3_program_ogam_luta_settings()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h630 SR_ARR(DWB_OGAM_RAMA_END_CNTL1_G, id), \