/openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 117 MachineInstr *DefInst = MO.getParent(); in checkADDrr() local 118 unsigned Opcode = DefInst->getOpcode(); in checkADDrr() 132 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() 142 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr() 147 BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp)) in checkADDrr() 148 .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp) in checkADDrr() 150 DefInst->eraseFromParent(); in checkADDrr() 287 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local 288 if (!DefInst) in removeLD() 291 if (DefInst->getOpcode() != BPF::LD_imm64) in removeLD() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUMemoryUtils.cpp | 119 Instruction *DefInst = Def->getMemoryInst(); in isReallyAClobber() local 121 if (isa<FenceInst>(DefInst)) in isReallyAClobber() 124 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in isReallyAClobber() 142 if (checkNoAlias(dyn_cast<AtomicCmpXchgInst>(DefInst)) || in isReallyAClobber() 143 checkNoAlias(dyn_cast<AtomicRMWInst>(DefInst))) in isReallyAClobber()
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/openbsd/gnu/llvm/llvm/lib/Transforms/Scalar/ |
H A D | EarlyCSE.cpp | 577 Instruction *DefInst = nullptr; member 585 : DefInst(Inst), Generation(Generation), MatchingId(MatchingId), in LoadValue() 1147 if (InVal.DefInst == nullptr) in getMatchingValue() 1162 Instruction *Matching = MemInstMatching ? MemInst.get() : InVal.DefInst; in getMatchingValue() 1163 Instruction *Other = MemInstMatching ? InVal.DefInst : MemInst.get(); in getMatchingValue() 1170 if (MemInst.isStore() && InVal.DefInst != Result) in getMatchingValue() 1179 if (!isNonTargetIntrinsicMatch(cast<IntrinsicInst>(InVal.DefInst), in getMatchingValue() 1185 !isSameMemGeneration(InVal.Generation, CurrentGeneration, InVal.DefInst, in getMatchingValue() 1474 << " to: " << *InVal.DefInst << '\n'); in processNode() 1555 if (InVal.DefInst && in processNode() [all …]
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H A D | DeadStoreElimination.cpp | 1110 bool isCompleteOverwrite(const MemoryLocation &DefLoc, Instruction *DefInst, in isCompleteOverwrite() 1124 return isOverwrite(UseInst, DefInst, *CC, DefLoc, InstWriteOffset, in isCompleteOverwrite() 1987 Instruction *DefInst = Def->getMemoryInst(); in eliminateRedundantStoresOfExistingValues() local 1988 auto MaybeDefLoc = getLocForWrite(DefInst); in eliminateRedundantStoresOfExistingValues() 1989 if (!MaybeDefLoc || !isRemovable(DefInst)) in eliminateRedundantStoresOfExistingValues() 2005 if (DefInst->isIdenticalTo(UpperInst)) in eliminateRedundantStoresOfExistingValues() 2008 if (auto *SI = dyn_cast<StoreInst>(DefInst)) { in eliminateRedundantStoresOfExistingValues() 2013 auto OR = isOverwrite(UpperInst, DefInst, UpperLoc, *MaybeDefLoc, in eliminateRedundantStoresOfExistingValues() 2023 if (!IsRedundantStore() || isReadClobber(*MaybeDefLoc, DefInst)) in eliminateRedundantStoresOfExistingValues() 2025 LLVM_DEBUG(dbgs() << "DSE: Remove No-Op Store:\n DEAD: " << *DefInst in eliminateRedundantStoresOfExistingValues() [all …]
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H A D | NewGVN.cpp | 3958 auto *DefInst = dyn_cast_or_null<Instruction>(Def); in eliminateInstructions() local 3959 if (DefInst && AllTempInstructions.count(DefInst)) { in eliminateInstructions() 3960 auto *PN = cast<PHINode>(DefInst); in eliminateInstructions()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCPreEmitPeephole.cpp | 258 MachineBasicBlock::iterator DefInst; in addLinkerOpt() member 320 MachineBasicBlock::iterator BBI = Pair->DefInst; in addLinkerOpt() 343 Pair->DefInst->addOperand(ImplDef); in addLinkerOpt() 351 Pair->DefInst->addOperand(*MF, PCRelLabel); in addLinkerOpt()
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H A D | PPCBranchCoalescing.cpp | 465 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local 466 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) { in canMoveToEnd()
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonCopyToCombine.cpp | 406 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local 407 if (!DefInst) in findPotentialNewifiableTFRs() 409 if (!isCombinableInstType(*DefInst, TII, ShouldCombineAggressively)) in findPotentialNewifiableTFRs() 414 MachineBasicBlock::iterator It(DefInst); in findPotentialNewifiableTFRs() 425 PotentiallyNewifiableTFR.insert(DefInst); in findPotentialNewifiableTFRs()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/ |
H A D | RegAllocFast.cpp | 370 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveOut() local 371 if (DefInst.getParent() != MBB) { in mayLiveOut() 375 if (!SelfLoopDef || dominates(*MBB, DefInst.getIterator(), SelfLoopDef)) in mayLiveOut() 376 SelfLoopDef = &DefInst; in mayLiveOut() 418 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local 419 if (DefInst.getParent() != MBB || ++C >= Limit) { in mayLiveIn()
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/openbsd/gnu/llvm/llvm/lib/Analysis/ |
H A D | MemorySSA.cpp | 289 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local 290 assert(DefInst && "Defining instruction not actually an instruction"); in instructionClobbersQuery() 292 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in instructionClobbersQuery() 318 ModRefInfo I = AA.getModRefInfo(DefInst, CB); in instructionClobbersQuery() 322 if (auto *DefLoad = dyn_cast<LoadInst>(DefInst)) in instructionClobbersQuery() 326 ModRefInfo I = AA.getModRefInfo(DefInst, UseLoc); in instructionClobbersQuery()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIPeepholeSDWA.cpp | 506 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local 507 if (!TII->isFoldableCopy(*DefInst)) in foldToImm() 510 const MachineOperand &Copied = DefInst->getOperand(1); in foldToImm()
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H A D | SIInstrInfo.cpp | 8158 auto *DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() local 8159 while (auto *MI = DefInst) { in getVRegSubRegDef() 8160 DefInst = nullptr; in getVRegSubRegDef() 8169 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() 8177 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() 8180 if (!DefInst) in getVRegSubRegDef()
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