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Searched refs:FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h20901 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h26414 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h25632 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29763 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28856 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h27137 #define FMT4_FMT_BIT_DEPTH_CONTROL__FMT_25FRC_SEL__SHIFT … macro