/openbsd/gnu/llvm/llvm/include/llvm/IR/ |
H A D | ConstrainedOps.def | 89 DAG_FUNCTION(nearbyint, 1, 1, experimental_constrained_nearbyint, FNEARBYINT)
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 926 FNEARBYINT, enumerator
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H A D | BasicTTIImpl.h | 1822 ISD = ISD::FNEARBYINT; in getTypeBasedIntrinsicInstrCost()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 215 case ISD::FNEARBYINT: return "fnearbyint"; in getOperationName()
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H A D | LegalizeFloatTypes.cpp | 103 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; in SoftenFloatResult() 1248 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; in ExpandFloatResult() 2267 case ISD::FNEARBYINT: in PromoteFloatResult() 2632 case ISD::FNEARBYINT: in SoftPromoteHalfResult()
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H A D | LegalizeVectorOps.cpp | 381 case ISD::FNEARBYINT: in LegalizeOp()
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H A D | LegalizeVectorTypes.cpp | 95 case ISD::FNEARBYINT: in ScalarizeVectorResult() 1040 case ISD::FNEARBYINT: in SplitVectorResult() 4085 case ISD::FNEARBYINT: in WidenVectorResult()
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H A D | LegalizeDAG.cpp | 4114 case ISD::FNEARBYINT: in ConvertNodeToLibcall() 4873 case ISD::FNEARBYINT: in PromoteNode()
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H A D | SelectionDAGBuilder.cpp | 6357 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; in visitIntrinsicCall() 8462 if (visitUnaryFloatCall(I, ISD::FNEARBYINT)) in visitCall()
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H A D | SelectionDAG.cpp | 4838 case ISD::FNEARBYINT: { in isKnownNeverNaN()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 333 setOperationAction(ISD::FNEARBYINT, {MVT::f16, MVT::f32, MVT::f64}, Custom); in AMDGPUTargetLowering() 451 ISD::FMUL, ISD::FMA, ISD::FRINT, ISD::FNEARBYINT, in AMDGPUTargetLowering() 573 case ISD::FNEARBYINT: in fnegFoldsIntoOp() 1256 case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG); in LowerOperation() 3978 case ISD::FNEARBYINT: // XXX - Should fround be handled? in performFNegCombine()
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H A D | AMDGPUISelDAGToDAG.cpp | 165 case ISD::FNEARBYINT: in fp16SrcZerosHighBits()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 899 ISD::FEXP2, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, in initActions()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 310 setOperationAction(ISD::FNEARBYINT, MVT::ppcf128, Expand); in PPCTargetLowering() 852 setOperationAction(ISD::FNEARBYINT, VT, Expand); in PPCTargetLowering() 914 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in PPCTargetLowering() 1005 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); in PPCTargetLowering() 1006 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); in PPCTargetLowering() 1012 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal); in PPCTargetLowering() 1018 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in PPCTargetLowering() 1213 setOperationAction(ISD::FNEARBYINT, MVT::f128, Legal); in PPCTargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 667 ISD::FSQRT, ISD::FFLOOR, ISD::FNEARBYINT, in AArch64TargetLowering() 705 setOperationAction(ISD::FNEARBYINT, MVT::v4f16, Expand); in AArch64TargetLowering() 716 setOperationAction(ISD::FNEARBYINT, MVT::v8f16, Expand); in AArch64TargetLowering() 733 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, in AArch64TargetLowering() 1025 ISD::FSQRT, ISD::FFLOOR, ISD::FNEARBYINT, in AArch64TargetLowering() 1172 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in AArch64TargetLowering() 1383 setOperationAction(ISD::FNEARBYINT, VT, Custom); in AArch64TargetLowering() 1757 setOperationAction(ISD::FNEARBYINT, VT, Custom); in addTypeForStreamingSVE() 1875 setOperationAction(ISD::FNEARBYINT, VT, Custom); in addTypeForFixedLengthSVE() 5874 case ISD::FNEARBYINT: in LowerOperation()
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 129 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1144 case ISD::FNEARBYINT: in PreprocessISelDAG() 1162 case ISD::FNEARBYINT: Imm = 0xC; break; in PreprocessISelDAG()
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H A D | X86ISelLowering.cpp | 583 setOperationAction(ISD::FNEARBYINT, VT, Action); in X86TargetLowering() 797 setOperationAction(ISD::FNEARBYINT, MVT::f80, Expand); in X86TargetLowering() 928 setOperationAction(ISD::FNEARBYINT, VT, Expand); in X86TargetLowering() 1239 setOperationAction(ISD::FNEARBYINT, RoundedTy, Legal); in X86TargetLowering() 1344 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering() 1761 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering() 2055 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering() 44858 case ISD::FNEARBYINT: in scalarizeExtEltFP()
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/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 461 setOperationAction(ISD::FNEARBYINT, VT, Legal); in SystemZTargetLowering() 521 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal); in SystemZTargetLowering() 553 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in SystemZTargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 374 setOperationAction(ISD::FNEARBYINT, VT, Expand); in addMVEVectorTypes() 887 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand); in ARMTargetLowering() 907 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Expand); in ARMTargetLowering() 923 setOperationAction(ISD::FNEARBYINT, MVT::v2f32, Expand); in ARMTargetLowering() 1056 setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand); in ARMTargetLowering() 1495 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); in ARMTargetLowering() 1511 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); in ARMTargetLowering()
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/openbsd/gnu/llvm/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 506 def fnearbyint : SDNode<"ISD::FNEARBYINT" , SDTFPUnaryOp>;
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1637 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 142 setOperationAction(ISD::FNEARBYINT, MVT::f16, Promote); in MipsSETargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 593 for (const auto &Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FRINT, in NVPTXTargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 368 setOperationAction({ISD::FREM, ISD::FNEARBYINT, ISD::FPOW, ISD::FPOWI, in RISCVTargetLowering() 737 setOperationAction(ISD::FNEARBYINT, VT, Expand); in RISCVTargetLowering()
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