| /openbsd/gnu/llvm/clang/lib/Driver/ToolChains/Arch/ |
| H A D | LoongArch.cpp | 46 StringRef FPU = A->getValue(); in getLoongArchABI() local
47 if (FPU == "64") in getLoongArchABI()
49 if (FPU == "32") in getLoongArchABI()
51 if (FPU == "0" || FPU == "none") in getLoongArchABI()
53 D.Diag(diag::err_drv_loongarch_invalid_mfpu_EQ) << FPU; in getLoongArchABI()
101 StringRef FPU = A->getValue(); in getLoongArchTargetFeatures() local
102 if (FPU == "64") { in getLoongArchTargetFeatures()
105 } else if (FPU == "32") { in getLoongArchTargetFeatures()
108 } else if (FPU == "0" || FPU == "none") { in getLoongArchTargetFeatures()
112 D.Diag(diag::err_drv_loongarch_invalid_mfpu_EQ) << FPU; in getLoongArchTargetFeatures()
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| /openbsd/gnu/llvm/clang/lib/Basic/Targets/ |
| H A D | AArch64.cpp | 57 FPU |= NeonMode; in setArchFeatures()
85 FPU |= NeonMode; in setArchFeatures()
103 FPU |= SveMode; in setArchFeatures()
116 FPU |= NeonMode; in setArchFeatures()
398 if (FPU & SveMode) in getTargetDefines()
401 if ((FPU & NeonMode) && (FPU & SveMode)) in getTargetDefines()
571 if (FPU & SveMode) in getTargetDefines()
731 FPU |= SveMode; in handleTargetFeatures()
736 FPU |= SveMode; in handleTargetFeatures()
943 FPU &= ~SveMode; in handleTargetFeatures()
[all …]
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| H A D | ARM.cpp | 498 FPU = 0; in handleTargetFeatures()
524 FPU |= VFP2FPU; in handleTargetFeatures()
530 FPU |= VFP3FPU; in handleTargetFeatures()
536 FPU |= VFP4FPU; in handleTargetFeatures()
542 FPU |= FPARMV8; in handleTargetFeatures()
547 FPU |= NeonFPU; in handleTargetFeatures()
582 FPU |= FPARMV8; in handleTargetFeatures()
864 if (FPU & VFP2FPU) in getTargetDefines()
866 if (FPU & VFP3FPU) in getTargetDefines()
868 if (FPU & VFP4FPU) in getTargetDefines()
[all …]
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| /openbsd/regress/sys/arch/amd64/fpu/ |
| H A D | README | 2 the Intel and AMD FPU using the libm function fegetenv(3). Implement
5 Load the FPU enviroment directy after exec with an assembly program.
6 Get the FPU default FPU status from libm.
7 Load the FPU enviroment with fegetenv(3).
8 Read the FPU storage area from proc0 via /dev/mem.
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| /openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZ196.td | 83 def : WriteRes<FPU, [Z196_FPUnit]>;
88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
761 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
765 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
804 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
833 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr],
871 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>;
885 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
902 def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>;
[all …]
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| H A D | SystemZScheduleZEC12.td | 84 def : WriteRes<FPU, [ZEC12_FPUnit]>;
89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>;
787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
799 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
803 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
842 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
871 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr],
909 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>;
923 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
940 def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>;
[all …]
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| /openbsd/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterInfoPOSIX_arm.cpp | 25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \
29 sizeof(RegisterInfoPOSIX_arm::FPU))
32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
163 return sizeof(struct RegisterInfoPOSIX_arm::FPU); in GetFPRSize()
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| H A D | RegisterContextDarwin_x86_64.h | 80 struct FPU { struct
112 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
119 FPU fpu;
190 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
196 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextDarwin_arm64.h | 80 struct FPU { struct
114 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
123 FPU fpu;
204 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
212 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextDarwin_i386.h | 75 struct FPU { struct
107 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
114 FPU fpu;
185 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
191 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextMach_x86_64.cpp | 31 FPU &fpu) { in DoReadFPU()
50 const FPU &fpu) { in DoWriteFPU()
52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextMach_i386.cpp | 29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
47 const FPU &fpu) { in DoWriteFPU()
49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextDarwin_arm.h | 98 struct FPU { struct
148 FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
156 FPU fpu;
237 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
245 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextMach_arm.cpp | 31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
54 const FPU &fpu) { in DoWriteFPU()
56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextMach_i386.h | 24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
30 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextMach_x86_64.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextMach_arm.h | 24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
32 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| /openbsd/gnu/gcc/gcc/config/sh/ |
| H A D | sh.opt | 25 ;; Set if the default precision of th FPU is single.
57 Generate SH2a FPU-less code
93 Generate SH4 FPU-less code
97 Generate code for SH4 400 series (MMU/FPU-less)
102 Generate code for SH4 500 series (FPU-less).
135 Generate SH4a FPU-less code
155 Generate 32-bit FPU-less SHmedia code
163 Generate 64-bit FPU-less SHmedia code
171 Generate FPU-less SHcompact code
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| /openbsd/gnu/llvm/lldb/source/Plugins/Process/MacOSX-Kernel/ |
| H A D | RegisterContextKDP_x86_64.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_i386.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_arm.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
33 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_arm64.h | 26 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
34 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_i386.cpp | 38 int RegisterContextKDP_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
85 const FPU &fpu) { in DoWriteFPU()
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| H A D | RegisterContextKDP_x86_64.cpp | 40 FPU &fpu) { in DoReadFPU()
88 const FPU &fpu) { in DoWriteFPU()
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| /openbsd/gnu/gcc/gcc/config/sparc/ |
| H A D | sparc.opt | 23 Target Report Mask(FPU)
27 Target RejectNegative Mask(FPU) MaskExists
31 Target RejectNegative InverseMask(FPU)
|