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Searched refs:GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_sh_mask.h8816 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h8655 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h6974 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4691 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h9028 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h14411 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h10646 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h14016 #define GCEA_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT … macro