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Searched refs:GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_sh_mask.h523 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_9_0_sh_mask.h27 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_9_1_sh_mask.h5570 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h6241 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h9748 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h10712 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h11443 #define GCEA_EDC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT … macro