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Searched refs:GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_sh_mask.h9876 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_9_2_1_sh_mask.h9726 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_9_4_3_sh_mask.h7430 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_9_4_2_sh_mask.h6097 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_11_0_0_sh_mask.h9482 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_10_1_0_sh_mask.h15500 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_11_0_3_sh_mask.h11102 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro
H A Dgc_10_3_0_sh_mask.h14470 #define GCEA_IO_WR_PRI_QUANT_PRI2__GROUP2_THRESHOLD_MASK … macro