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Searched refs:GDS_PS5_CTXSW_CNT3__UPDN__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h17516 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h18104 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT 0x0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h14185 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT macro
H A Dgc_9_1_sh_mask.h15492 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT macro
H A Dgc_9_2_1_sh_mask.h15354 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT macro
H A Dgc_9_4_3_sh_mask.h17657 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT macro
H A Dgc_9_4_2_sh_mask.h7696 #define GDS_PS5_CTXSW_CNT3__UPDN__SHIFT macro