1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise hardware features such as 10 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_TARGETPARSER_TARGETPARSER_H 15 #define LLVM_TARGETPARSER_TARGETPARSER_H 16 17 #include "llvm/ADT/StringRef.h" 18 #include <cstdint> 19 // FIXME: vector is used because that's what clang uses for subtarget feature 20 // lists, but SmallVector would probably be better 21 #include <vector> 22 23 namespace llvm { 24 25 template <typename T> class SmallVectorImpl; 26 class Triple; 27 28 // Target specific information in their own namespaces. 29 // (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h) 30 // These should be generated from TableGen because the information is already 31 // there, and there is where new information about targets will be added. 32 // FIXME: To TableGen this we need to make some table generated files available 33 // even if the back-end is not compiled with LLVM, plus we need to create a new 34 // back-end to TableGen to create these clean tables. 35 namespace AMDGPU { 36 37 /// GPU kinds supported by the AMDGPU target. 38 enum GPUKind : uint32_t { 39 // Not specified processor. 40 GK_NONE = 0, 41 42 // R600-based processors. 43 GK_R600 = 1, 44 GK_R630 = 2, 45 GK_RS880 = 3, 46 GK_RV670 = 4, 47 GK_RV710 = 5, 48 GK_RV730 = 6, 49 GK_RV770 = 7, 50 GK_CEDAR = 8, 51 GK_CYPRESS = 9, 52 GK_JUNIPER = 10, 53 GK_REDWOOD = 11, 54 GK_SUMO = 12, 55 GK_BARTS = 13, 56 GK_CAICOS = 14, 57 GK_CAYMAN = 15, 58 GK_TURKS = 16, 59 60 GK_R600_FIRST = GK_R600, 61 GK_R600_LAST = GK_TURKS, 62 63 // AMDGCN-based processors. 64 GK_GFX600 = 32, 65 GK_GFX601 = 33, 66 GK_GFX602 = 34, 67 68 GK_GFX700 = 40, 69 GK_GFX701 = 41, 70 GK_GFX702 = 42, 71 GK_GFX703 = 43, 72 GK_GFX704 = 44, 73 GK_GFX705 = 45, 74 75 GK_GFX801 = 50, 76 GK_GFX802 = 51, 77 GK_GFX803 = 52, 78 GK_GFX805 = 53, 79 GK_GFX810 = 54, 80 81 GK_GFX900 = 60, 82 GK_GFX902 = 61, 83 GK_GFX904 = 62, 84 GK_GFX906 = 63, 85 GK_GFX908 = 64, 86 GK_GFX909 = 65, 87 GK_GFX90A = 66, 88 GK_GFX90C = 67, 89 GK_GFX940 = 68, 90 91 GK_GFX1010 = 71, 92 GK_GFX1011 = 72, 93 GK_GFX1012 = 73, 94 GK_GFX1013 = 74, 95 GK_GFX1030 = 75, 96 GK_GFX1031 = 76, 97 GK_GFX1032 = 77, 98 GK_GFX1033 = 78, 99 GK_GFX1034 = 79, 100 GK_GFX1035 = 80, 101 GK_GFX1036 = 81, 102 103 GK_GFX1100 = 90, 104 GK_GFX1101 = 91, 105 GK_GFX1102 = 92, 106 GK_GFX1103 = 93, 107 108 GK_AMDGCN_FIRST = GK_GFX600, 109 GK_AMDGCN_LAST = GK_GFX1103, 110 }; 111 112 /// Instruction set architecture version. 113 struct IsaVersion { 114 unsigned Major; 115 unsigned Minor; 116 unsigned Stepping; 117 }; 118 119 // This isn't comprehensive for now, just things that are needed from the 120 // frontend driver. 121 enum ArchFeatureKind : uint32_t { 122 FEATURE_NONE = 0, 123 124 // These features only exist for r600, and are implied true for amdgcn. 125 FEATURE_FMA = 1 << 1, 126 FEATURE_LDEXP = 1 << 2, 127 FEATURE_FP64 = 1 << 3, 128 129 // Common features. 130 FEATURE_FAST_FMA_F32 = 1 << 4, 131 FEATURE_FAST_DENORMAL_F32 = 1 << 5, 132 133 // Wavefront 32 is available. 134 FEATURE_WAVE32 = 1 << 6, 135 136 // Xnack is available. 137 FEATURE_XNACK = 1 << 7, 138 139 // Sram-ecc is available. 140 FEATURE_SRAMECC = 1 << 8, 141 }; 142 143 StringRef getArchNameAMDGCN(GPUKind AK); 144 StringRef getArchNameR600(GPUKind AK); 145 StringRef getCanonicalArchName(const Triple &T, StringRef Arch); 146 GPUKind parseArchAMDGCN(StringRef CPU); 147 GPUKind parseArchR600(StringRef CPU); 148 unsigned getArchAttrAMDGCN(GPUKind AK); 149 unsigned getArchAttrR600(GPUKind AK); 150 151 void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values); 152 void fillValidArchListR600(SmallVectorImpl<StringRef> &Values); 153 154 IsaVersion getIsaVersion(StringRef GPU); 155 156 } // namespace AMDGPU 157 } // namespace llvm 158 159 #endif 160