1 /* CPU data header for frv. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright 1996-2005 Free Software Foundation, Inc. 6 7 This file is part of the GNU Binutils and/or GDB, the GNU debugger. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2, or (at your option) 12 any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23 */ 24 25 #ifndef FRV_CPU_H 26 #define FRV_CPU_H 27 28 #include "opcode/cgen-bitset.h" 29 30 #define CGEN_ARCH frv 31 32 /* Given symbol S, return frv_cgen_<S>. */ 33 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 34 #define CGEN_SYM(s) frv##_cgen_##s 35 #else 36 #define CGEN_SYM(s) frv/**/_cgen_/**/s 37 #endif 38 39 40 /* Selected cpu families. */ 41 #define HAVE_CPU_FRVBF 42 43 #define CGEN_INSN_LSB0_P 1 44 45 /* Minimum size of any insn (in bytes). */ 46 #define CGEN_MIN_INSN_SIZE 4 47 48 /* Maximum size of any insn (in bytes). */ 49 #define CGEN_MAX_INSN_SIZE 4 50 51 #define CGEN_INT_INSN_P 1 52 53 /* Maximum number of syntax elements in an instruction. */ 54 #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 22 55 56 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. 57 e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands 58 we can't hash on everything up to the space. */ 59 #define CGEN_MNEMONIC_OPERANDS 60 61 /* Maximum number of fields in an instruction. */ 62 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 10 63 64 /* Enums. */ 65 66 /* Enum declaration for insn op enums. */ 67 typedef enum insn_op { 68 OP_00, OP_01, OP_02, OP_03 69 , OP_04, OP_05, OP_06, OP_07 70 , OP_08, OP_09, OP_0A, OP_0B 71 , OP_0C, OP_0D, OP_0E, OP_0F 72 , OP_10, OP_11, OP_12, OP_13 73 , OP_14, OP_15, OP_16, OP_17 74 , OP_18, OP_19, OP_1A, OP_1B 75 , OP_1C, OP_1D, OP_1E, OP_1F 76 , OP_20, OP_21, OP_22, OP_23 77 , OP_24, OP_25, OP_26, OP_27 78 , OP_28, OP_29, OP_2A, OP_2B 79 , OP_2C, OP_2D, OP_2E, OP_2F 80 , OP_30, OP_31, OP_32, OP_33 81 , OP_34, OP_35, OP_36, OP_37 82 , OP_38, OP_39, OP_3A, OP_3B 83 , OP_3C, OP_3D, OP_3E, OP_3F 84 , OP_40, OP_41, OP_42, OP_43 85 , OP_44, OP_45, OP_46, OP_47 86 , OP_48, OP_49, OP_4A, OP_4B 87 , OP_4C, OP_4D, OP_4E, OP_4F 88 , OP_50, OP_51, OP_52, OP_53 89 , OP_54, OP_55, OP_56, OP_57 90 , OP_58, OP_59, OP_5A, OP_5B 91 , OP_5C, OP_5D, OP_5E, OP_5F 92 , OP_60, OP_61, OP_62, OP_63 93 , OP_64, OP_65, OP_66, OP_67 94 , OP_68, OP_69, OP_6A, OP_6B 95 , OP_6C, OP_6D, OP_6E, OP_6F 96 , OP_70, OP_71, OP_72, OP_73 97 , OP_74, OP_75, OP_76, OP_77 98 , OP_78, OP_79, OP_7A, OP_7B 99 , OP_7C, OP_7D, OP_7E, OP_7F 100 } INSN_OP; 101 102 /* Enum declaration for insn ope enums. */ 103 typedef enum insn_ope1 { 104 OPE1_00, OPE1_01, OPE1_02, OPE1_03 105 , OPE1_04, OPE1_05, OPE1_06, OPE1_07 106 , OPE1_08, OPE1_09, OPE1_0A, OPE1_0B 107 , OPE1_0C, OPE1_0D, OPE1_0E, OPE1_0F 108 , OPE1_10, OPE1_11, OPE1_12, OPE1_13 109 , OPE1_14, OPE1_15, OPE1_16, OPE1_17 110 , OPE1_18, OPE1_19, OPE1_1A, OPE1_1B 111 , OPE1_1C, OPE1_1D, OPE1_1E, OPE1_1F 112 , OPE1_20, OPE1_21, OPE1_22, OPE1_23 113 , OPE1_24, OPE1_25, OPE1_26, OPE1_27 114 , OPE1_28, OPE1_29, OPE1_2A, OPE1_2B 115 , OPE1_2C, OPE1_2D, OPE1_2E, OPE1_2F 116 , OPE1_30, OPE1_31, OPE1_32, OPE1_33 117 , OPE1_34, OPE1_35, OPE1_36, OPE1_37 118 , OPE1_38, OPE1_39, OPE1_3A, OPE1_3B 119 , OPE1_3C, OPE1_3D, OPE1_3E, OPE1_3F 120 } INSN_OPE1; 121 122 /* Enum declaration for insn ope enums. */ 123 typedef enum insn_ope2 { 124 OPE2_00, OPE2_01, OPE2_02, OPE2_03 125 , OPE2_04, OPE2_05, OPE2_06, OPE2_07 126 , OPE2_08, OPE2_09, OPE2_0A, OPE2_0B 127 , OPE2_0C, OPE2_0D, OPE2_0E, OPE2_0F 128 } INSN_OPE2; 129 130 /* Enum declaration for insn ope enums. */ 131 typedef enum insn_ope3 { 132 OPE3_00, OPE3_01, OPE3_02, OPE3_03 133 , OPE3_04, OPE3_05, OPE3_06, OPE3_07 134 } INSN_OPE3; 135 136 /* Enum declaration for insn ope enums. */ 137 typedef enum insn_ope4 { 138 OPE4_0, OPE4_1, OPE4_2, OPE4_3 139 } INSN_OPE4; 140 141 /* Enum declaration for integer branch cond enums. */ 142 typedef enum int_cc { 143 ICC_NEV, ICC_C, ICC_V, ICC_LT 144 , ICC_EQ, ICC_LS, ICC_N, ICC_LE 145 , ICC_RA, ICC_NC, ICC_NV, ICC_GE 146 , ICC_NE, ICC_HI, ICC_P, ICC_GT 147 } INT_CC; 148 149 /* Enum declaration for float branch cond enums. */ 150 typedef enum flt_cc { 151 FCC_NEV, FCC_U, FCC_GT, FCC_UG 152 , FCC_LT, FCC_UL, FCC_LG, FCC_NE 153 , FCC_EQ, FCC_UE, FCC_GE, FCC_UGE 154 , FCC_LE, FCC_ULE, FCC_O, FCC_RA 155 } FLT_CC; 156 157 /* Enum declaration for . */ 158 typedef enum gr_names { 159 H_GR_SP = 1, H_GR_FP = 2, H_GR_GR0 = 0, H_GR_GR1 = 1 160 , H_GR_GR2 = 2, H_GR_GR3 = 3, H_GR_GR4 = 4, H_GR_GR5 = 5 161 , H_GR_GR6 = 6, H_GR_GR7 = 7, H_GR_GR8 = 8, H_GR_GR9 = 9 162 , H_GR_GR10 = 10, H_GR_GR11 = 11, H_GR_GR12 = 12, H_GR_GR13 = 13 163 , H_GR_GR14 = 14, H_GR_GR15 = 15, H_GR_GR16 = 16, H_GR_GR17 = 17 164 , H_GR_GR18 = 18, H_GR_GR19 = 19, H_GR_GR20 = 20, H_GR_GR21 = 21 165 , H_GR_GR22 = 22, H_GR_GR23 = 23, H_GR_GR24 = 24, H_GR_GR25 = 25 166 , H_GR_GR26 = 26, H_GR_GR27 = 27, H_GR_GR28 = 28, H_GR_GR29 = 29 167 , H_GR_GR30 = 30, H_GR_GR31 = 31, H_GR_GR32 = 32, H_GR_GR33 = 33 168 , H_GR_GR34 = 34, H_GR_GR35 = 35, H_GR_GR36 = 36, H_GR_GR37 = 37 169 , H_GR_GR38 = 38, H_GR_GR39 = 39, H_GR_GR40 = 40, H_GR_GR41 = 41 170 , H_GR_GR42 = 42, H_GR_GR43 = 43, H_GR_GR44 = 44, H_GR_GR45 = 45 171 , H_GR_GR46 = 46, H_GR_GR47 = 47, H_GR_GR48 = 48, H_GR_GR49 = 49 172 , H_GR_GR50 = 50, H_GR_GR51 = 51, H_GR_GR52 = 52, H_GR_GR53 = 53 173 , H_GR_GR54 = 54, H_GR_GR55 = 55, H_GR_GR56 = 56, H_GR_GR57 = 57 174 , H_GR_GR58 = 58, H_GR_GR59 = 59, H_GR_GR60 = 60, H_GR_GR61 = 61 175 , H_GR_GR62 = 62, H_GR_GR63 = 63 176 } GR_NAMES; 177 178 /* Enum declaration for . */ 179 typedef enum fr_names { 180 H_FR_FR0, H_FR_FR1, H_FR_FR2, H_FR_FR3 181 , H_FR_FR4, H_FR_FR5, H_FR_FR6, H_FR_FR7 182 , H_FR_FR8, H_FR_FR9, H_FR_FR10, H_FR_FR11 183 , H_FR_FR12, H_FR_FR13, H_FR_FR14, H_FR_FR15 184 , H_FR_FR16, H_FR_FR17, H_FR_FR18, H_FR_FR19 185 , H_FR_FR20, H_FR_FR21, H_FR_FR22, H_FR_FR23 186 , H_FR_FR24, H_FR_FR25, H_FR_FR26, H_FR_FR27 187 , H_FR_FR28, H_FR_FR29, H_FR_FR30, H_FR_FR31 188 , H_FR_FR32, H_FR_FR33, H_FR_FR34, H_FR_FR35 189 , H_FR_FR36, H_FR_FR37, H_FR_FR38, H_FR_FR39 190 , H_FR_FR40, H_FR_FR41, H_FR_FR42, H_FR_FR43 191 , H_FR_FR44, H_FR_FR45, H_FR_FR46, H_FR_FR47 192 , H_FR_FR48, H_FR_FR49, H_FR_FR50, H_FR_FR51 193 , H_FR_FR52, H_FR_FR53, H_FR_FR54, H_FR_FR55 194 , H_FR_FR56, H_FR_FR57, H_FR_FR58, H_FR_FR59 195 , H_FR_FR60, H_FR_FR61, H_FR_FR62, H_FR_FR63 196 } FR_NAMES; 197 198 /* Enum declaration for . */ 199 typedef enum cpr_names { 200 H_CPR_CPR0, H_CPR_CPR1, H_CPR_CPR2, H_CPR_CPR3 201 , H_CPR_CPR4, H_CPR_CPR5, H_CPR_CPR6, H_CPR_CPR7 202 , H_CPR_CPR8, H_CPR_CPR9, H_CPR_CPR10, H_CPR_CPR11 203 , H_CPR_CPR12, H_CPR_CPR13, H_CPR_CPR14, H_CPR_CPR15 204 , H_CPR_CPR16, H_CPR_CPR17, H_CPR_CPR18, H_CPR_CPR19 205 , H_CPR_CPR20, H_CPR_CPR21, H_CPR_CPR22, H_CPR_CPR23 206 , H_CPR_CPR24, H_CPR_CPR25, H_CPR_CPR26, H_CPR_CPR27 207 , H_CPR_CPR28, H_CPR_CPR29, H_CPR_CPR30, H_CPR_CPR31 208 , H_CPR_CPR32, H_CPR_CPR33, H_CPR_CPR34, H_CPR_CPR35 209 , H_CPR_CPR36, H_CPR_CPR37, H_CPR_CPR38, H_CPR_CPR39 210 , H_CPR_CPR40, H_CPR_CPR41, H_CPR_CPR42, H_CPR_CPR43 211 , H_CPR_CPR44, H_CPR_CPR45, H_CPR_CPR46, H_CPR_CPR47 212 , H_CPR_CPR48, H_CPR_CPR49, H_CPR_CPR50, H_CPR_CPR51 213 , H_CPR_CPR52, H_CPR_CPR53, H_CPR_CPR54, H_CPR_CPR55 214 , H_CPR_CPR56, H_CPR_CPR57, H_CPR_CPR58, H_CPR_CPR59 215 , H_CPR_CPR60, H_CPR_CPR61, H_CPR_CPR62, H_CPR_CPR63 216 } CPR_NAMES; 217 218 /* Enum declaration for . */ 219 typedef enum spr_names { 220 H_SPR_PSR = 0, H_SPR_PCSR = 1, H_SPR_BPCSR = 2, H_SPR_TBR = 3 221 , H_SPR_BPSR = 4, H_SPR_HSR0 = 16, H_SPR_HSR1 = 17, H_SPR_HSR2 = 18 222 , H_SPR_HSR3 = 19, H_SPR_HSR4 = 20, H_SPR_HSR5 = 21, H_SPR_HSR6 = 22 223 , H_SPR_HSR7 = 23, H_SPR_HSR8 = 24, H_SPR_HSR9 = 25, H_SPR_HSR10 = 26 224 , H_SPR_HSR11 = 27, H_SPR_HSR12 = 28, H_SPR_HSR13 = 29, H_SPR_HSR14 = 30 225 , H_SPR_HSR15 = 31, H_SPR_HSR16 = 32, H_SPR_HSR17 = 33, H_SPR_HSR18 = 34 226 , H_SPR_HSR19 = 35, H_SPR_HSR20 = 36, H_SPR_HSR21 = 37, H_SPR_HSR22 = 38 227 , H_SPR_HSR23 = 39, H_SPR_HSR24 = 40, H_SPR_HSR25 = 41, H_SPR_HSR26 = 42 228 , H_SPR_HSR27 = 43, H_SPR_HSR28 = 44, H_SPR_HSR29 = 45, H_SPR_HSR30 = 46 229 , H_SPR_HSR31 = 47, H_SPR_HSR32 = 48, H_SPR_HSR33 = 49, H_SPR_HSR34 = 50 230 , H_SPR_HSR35 = 51, H_SPR_HSR36 = 52, H_SPR_HSR37 = 53, H_SPR_HSR38 = 54 231 , H_SPR_HSR39 = 55, H_SPR_HSR40 = 56, H_SPR_HSR41 = 57, H_SPR_HSR42 = 58 232 , H_SPR_HSR43 = 59, H_SPR_HSR44 = 60, H_SPR_HSR45 = 61, H_SPR_HSR46 = 62 233 , H_SPR_HSR47 = 63, H_SPR_HSR48 = 64, H_SPR_HSR49 = 65, H_SPR_HSR50 = 66 234 , H_SPR_HSR51 = 67, H_SPR_HSR52 = 68, H_SPR_HSR53 = 69, H_SPR_HSR54 = 70 235 , H_SPR_HSR55 = 71, H_SPR_HSR56 = 72, H_SPR_HSR57 = 73, H_SPR_HSR58 = 74 236 , H_SPR_HSR59 = 75, H_SPR_HSR60 = 76, H_SPR_HSR61 = 77, H_SPR_HSR62 = 78 237 , H_SPR_HSR63 = 79, H_SPR_CCR = 256, H_SPR_CCCR = 263, H_SPR_LR = 272 238 , H_SPR_LCR = 273, H_SPR_IACC0H = 280, H_SPR_IACC0L = 281, H_SPR_ISR = 288 239 , H_SPR_NEEAR0 = 352, H_SPR_NEEAR1 = 353, H_SPR_NEEAR2 = 354, H_SPR_NEEAR3 = 355 240 , H_SPR_NEEAR4 = 356, H_SPR_NEEAR5 = 357, H_SPR_NEEAR6 = 358, H_SPR_NEEAR7 = 359 241 , H_SPR_NEEAR8 = 360, H_SPR_NEEAR9 = 361, H_SPR_NEEAR10 = 362, H_SPR_NEEAR11 = 363 242 , H_SPR_NEEAR12 = 364, H_SPR_NEEAR13 = 365, H_SPR_NEEAR14 = 366, H_SPR_NEEAR15 = 367 243 , H_SPR_NEEAR16 = 368, H_SPR_NEEAR17 = 369, H_SPR_NEEAR18 = 370, H_SPR_NEEAR19 = 371 244 , H_SPR_NEEAR20 = 372, H_SPR_NEEAR21 = 373, H_SPR_NEEAR22 = 374, H_SPR_NEEAR23 = 375 245 , H_SPR_NEEAR24 = 376, H_SPR_NEEAR25 = 377, H_SPR_NEEAR26 = 378, H_SPR_NEEAR27 = 379 246 , H_SPR_NEEAR28 = 380, H_SPR_NEEAR29 = 381, H_SPR_NEEAR30 = 382, H_SPR_NEEAR31 = 383 247 , H_SPR_NESR0 = 384, H_SPR_NESR1 = 385, H_SPR_NESR2 = 386, H_SPR_NESR3 = 387 248 , H_SPR_NESR4 = 388, H_SPR_NESR5 = 389, H_SPR_NESR6 = 390, H_SPR_NESR7 = 391 249 , H_SPR_NESR8 = 392, H_SPR_NESR9 = 393, H_SPR_NESR10 = 394, H_SPR_NESR11 = 395 250 , H_SPR_NESR12 = 396, H_SPR_NESR13 = 397, H_SPR_NESR14 = 398, H_SPR_NESR15 = 399 251 , H_SPR_NESR16 = 400, H_SPR_NESR17 = 401, H_SPR_NESR18 = 402, H_SPR_NESR19 = 403 252 , H_SPR_NESR20 = 404, H_SPR_NESR21 = 405, H_SPR_NESR22 = 406, H_SPR_NESR23 = 407 253 , H_SPR_NESR24 = 408, H_SPR_NESR25 = 409, H_SPR_NESR26 = 410, H_SPR_NESR27 = 411 254 , H_SPR_NESR28 = 412, H_SPR_NESR29 = 413, H_SPR_NESR30 = 414, H_SPR_NESR31 = 415 255 , H_SPR_NECR = 416, H_SPR_GNER0 = 432, H_SPR_GNER1 = 433, H_SPR_FNER0 = 434 256 , H_SPR_FNER1 = 435, H_SPR_EPCR0 = 512, H_SPR_EPCR1 = 513, H_SPR_EPCR2 = 514 257 , H_SPR_EPCR3 = 515, H_SPR_EPCR4 = 516, H_SPR_EPCR5 = 517, H_SPR_EPCR6 = 518 258 , H_SPR_EPCR7 = 519, H_SPR_EPCR8 = 520, H_SPR_EPCR9 = 521, H_SPR_EPCR10 = 522 259 , H_SPR_EPCR11 = 523, H_SPR_EPCR12 = 524, H_SPR_EPCR13 = 525, H_SPR_EPCR14 = 526 260 , H_SPR_EPCR15 = 527, H_SPR_EPCR16 = 528, H_SPR_EPCR17 = 529, H_SPR_EPCR18 = 530 261 , H_SPR_EPCR19 = 531, H_SPR_EPCR20 = 532, H_SPR_EPCR21 = 533, H_SPR_EPCR22 = 534 262 , H_SPR_EPCR23 = 535, H_SPR_EPCR24 = 536, H_SPR_EPCR25 = 537, H_SPR_EPCR26 = 538 263 , H_SPR_EPCR27 = 539, H_SPR_EPCR28 = 540, H_SPR_EPCR29 = 541, H_SPR_EPCR30 = 542 264 , H_SPR_EPCR31 = 543, H_SPR_EPCR32 = 544, H_SPR_EPCR33 = 545, H_SPR_EPCR34 = 546 265 , H_SPR_EPCR35 = 547, H_SPR_EPCR36 = 548, H_SPR_EPCR37 = 549, H_SPR_EPCR38 = 550 266 , H_SPR_EPCR39 = 551, H_SPR_EPCR40 = 552, H_SPR_EPCR41 = 553, H_SPR_EPCR42 = 554 267 , H_SPR_EPCR43 = 555, H_SPR_EPCR44 = 556, H_SPR_EPCR45 = 557, H_SPR_EPCR46 = 558 268 , H_SPR_EPCR47 = 559, H_SPR_EPCR48 = 560, H_SPR_EPCR49 = 561, H_SPR_EPCR50 = 562 269 , H_SPR_EPCR51 = 563, H_SPR_EPCR52 = 564, H_SPR_EPCR53 = 565, H_SPR_EPCR54 = 566 270 , H_SPR_EPCR55 = 567, H_SPR_EPCR56 = 568, H_SPR_EPCR57 = 569, H_SPR_EPCR58 = 570 271 , H_SPR_EPCR59 = 571, H_SPR_EPCR60 = 572, H_SPR_EPCR61 = 573, H_SPR_EPCR62 = 574 272 , H_SPR_EPCR63 = 575, H_SPR_ESR0 = 576, H_SPR_ESR1 = 577, H_SPR_ESR2 = 578 273 , H_SPR_ESR3 = 579, H_SPR_ESR4 = 580, H_SPR_ESR5 = 581, H_SPR_ESR6 = 582 274 , H_SPR_ESR7 = 583, H_SPR_ESR8 = 584, H_SPR_ESR9 = 585, H_SPR_ESR10 = 586 275 , H_SPR_ESR11 = 587, H_SPR_ESR12 = 588, H_SPR_ESR13 = 589, H_SPR_ESR14 = 590 276 , H_SPR_ESR15 = 591, H_SPR_ESR16 = 592, H_SPR_ESR17 = 593, H_SPR_ESR18 = 594 277 , H_SPR_ESR19 = 595, H_SPR_ESR20 = 596, H_SPR_ESR21 = 597, H_SPR_ESR22 = 598 278 , H_SPR_ESR23 = 599, H_SPR_ESR24 = 600, H_SPR_ESR25 = 601, H_SPR_ESR26 = 602 279 , H_SPR_ESR27 = 603, H_SPR_ESR28 = 604, H_SPR_ESR29 = 605, H_SPR_ESR30 = 606 280 , H_SPR_ESR31 = 607, H_SPR_ESR32 = 608, H_SPR_ESR33 = 609, H_SPR_ESR34 = 610 281 , H_SPR_ESR35 = 611, H_SPR_ESR36 = 612, H_SPR_ESR37 = 613, H_SPR_ESR38 = 614 282 , H_SPR_ESR39 = 615, H_SPR_ESR40 = 616, H_SPR_ESR41 = 617, H_SPR_ESR42 = 618 283 , H_SPR_ESR43 = 619, H_SPR_ESR44 = 620, H_SPR_ESR45 = 621, H_SPR_ESR46 = 622 284 , H_SPR_ESR47 = 623, H_SPR_ESR48 = 624, H_SPR_ESR49 = 625, H_SPR_ESR50 = 626 285 , H_SPR_ESR51 = 627, H_SPR_ESR52 = 628, H_SPR_ESR53 = 629, H_SPR_ESR54 = 630 286 , H_SPR_ESR55 = 631, H_SPR_ESR56 = 632, H_SPR_ESR57 = 633, H_SPR_ESR58 = 634 287 , H_SPR_ESR59 = 635, H_SPR_ESR60 = 636, H_SPR_ESR61 = 637, H_SPR_ESR62 = 638 288 , H_SPR_ESR63 = 639, H_SPR_EIR0 = 640, H_SPR_EIR1 = 641, H_SPR_EIR2 = 642 289 , H_SPR_EIR3 = 643, H_SPR_EIR4 = 644, H_SPR_EIR5 = 645, H_SPR_EIR6 = 646 290 , H_SPR_EIR7 = 647, H_SPR_EIR8 = 648, H_SPR_EIR9 = 649, H_SPR_EIR10 = 650 291 , H_SPR_EIR11 = 651, H_SPR_EIR12 = 652, H_SPR_EIR13 = 653, H_SPR_EIR14 = 654 292 , H_SPR_EIR15 = 655, H_SPR_EIR16 = 656, H_SPR_EIR17 = 657, H_SPR_EIR18 = 658 293 , H_SPR_EIR19 = 659, H_SPR_EIR20 = 660, H_SPR_EIR21 = 661, H_SPR_EIR22 = 662 294 , H_SPR_EIR23 = 663, H_SPR_EIR24 = 664, H_SPR_EIR25 = 665, H_SPR_EIR26 = 666 295 , H_SPR_EIR27 = 667, H_SPR_EIR28 = 668, H_SPR_EIR29 = 669, H_SPR_EIR30 = 670 296 , H_SPR_EIR31 = 671, H_SPR_ESFR0 = 672, H_SPR_ESFR1 = 673, H_SPR_SR0 = 768 297 , H_SPR_SR1 = 769, H_SPR_SR2 = 770, H_SPR_SR3 = 771, H_SPR_SCR0 = 832 298 , H_SPR_SCR1 = 833, H_SPR_SCR2 = 834, H_SPR_SCR3 = 835, H_SPR_FSR0 = 1024 299 , H_SPR_FSR1 = 1025, H_SPR_FSR2 = 1026, H_SPR_FSR3 = 1027, H_SPR_FSR4 = 1028 300 , H_SPR_FSR5 = 1029, H_SPR_FSR6 = 1030, H_SPR_FSR7 = 1031, H_SPR_FSR8 = 1032 301 , H_SPR_FSR9 = 1033, H_SPR_FSR10 = 1034, H_SPR_FSR11 = 1035, H_SPR_FSR12 = 1036 302 , H_SPR_FSR13 = 1037, H_SPR_FSR14 = 1038, H_SPR_FSR15 = 1039, H_SPR_FSR16 = 1040 303 , H_SPR_FSR17 = 1041, H_SPR_FSR18 = 1042, H_SPR_FSR19 = 1043, H_SPR_FSR20 = 1044 304 , H_SPR_FSR21 = 1045, H_SPR_FSR22 = 1046, H_SPR_FSR23 = 1047, H_SPR_FSR24 = 1048 305 , H_SPR_FSR25 = 1049, H_SPR_FSR26 = 1050, H_SPR_FSR27 = 1051, H_SPR_FSR28 = 1052 306 , H_SPR_FSR29 = 1053, H_SPR_FSR30 = 1054, H_SPR_FSR31 = 1055, H_SPR_FSR32 = 1056 307 , H_SPR_FSR33 = 1057, H_SPR_FSR34 = 1058, H_SPR_FSR35 = 1059, H_SPR_FSR36 = 1060 308 , H_SPR_FSR37 = 1061, H_SPR_FSR38 = 1062, H_SPR_FSR39 = 1063, H_SPR_FSR40 = 1064 309 , H_SPR_FSR41 = 1065, H_SPR_FSR42 = 1066, H_SPR_FSR43 = 1067, H_SPR_FSR44 = 1068 310 , H_SPR_FSR45 = 1069, H_SPR_FSR46 = 1070, H_SPR_FSR47 = 1071, H_SPR_FSR48 = 1072 311 , H_SPR_FSR49 = 1073, H_SPR_FSR50 = 1074, H_SPR_FSR51 = 1075, H_SPR_FSR52 = 1076 312 , H_SPR_FSR53 = 1077, H_SPR_FSR54 = 1078, H_SPR_FSR55 = 1079, H_SPR_FSR56 = 1080 313 , H_SPR_FSR57 = 1081, H_SPR_FSR58 = 1082, H_SPR_FSR59 = 1083, H_SPR_FSR60 = 1084 314 , H_SPR_FSR61 = 1085, H_SPR_FSR62 = 1086, H_SPR_FSR63 = 1087, H_SPR_FQOP0 = 1088 315 , H_SPR_FQOP1 = 1090, H_SPR_FQOP2 = 1092, H_SPR_FQOP3 = 1094, H_SPR_FQOP4 = 1096 316 , H_SPR_FQOP5 = 1098, H_SPR_FQOP6 = 1100, H_SPR_FQOP7 = 1102, H_SPR_FQOP8 = 1104 317 , H_SPR_FQOP9 = 1106, H_SPR_FQOP10 = 1108, H_SPR_FQOP11 = 1110, H_SPR_FQOP12 = 1112 318 , H_SPR_FQOP13 = 1114, H_SPR_FQOP14 = 1116, H_SPR_FQOP15 = 1118, H_SPR_FQOP16 = 1120 319 , H_SPR_FQOP17 = 1122, H_SPR_FQOP18 = 1124, H_SPR_FQOP19 = 1126, H_SPR_FQOP20 = 1128 320 , H_SPR_FQOP21 = 1130, H_SPR_FQOP22 = 1132, H_SPR_FQOP23 = 1134, H_SPR_FQOP24 = 1136 321 , H_SPR_FQOP25 = 1138, H_SPR_FQOP26 = 1140, H_SPR_FQOP27 = 1142, H_SPR_FQOP28 = 1144 322 , H_SPR_FQOP29 = 1146, H_SPR_FQOP30 = 1148, H_SPR_FQOP31 = 1150, H_SPR_FQST0 = 1089 323 , H_SPR_FQST1 = 1091, H_SPR_FQST2 = 1093, H_SPR_FQST3 = 1095, H_SPR_FQST4 = 1097 324 , H_SPR_FQST5 = 1099, H_SPR_FQST6 = 1101, H_SPR_FQST7 = 1103, H_SPR_FQST8 = 1105 325 , H_SPR_FQST9 = 1107, H_SPR_FQST10 = 1109, H_SPR_FQST11 = 1111, H_SPR_FQST12 = 1113 326 , H_SPR_FQST13 = 1115, H_SPR_FQST14 = 1117, H_SPR_FQST15 = 1119, H_SPR_FQST16 = 1121 327 , H_SPR_FQST17 = 1123, H_SPR_FQST18 = 1125, H_SPR_FQST19 = 1127, H_SPR_FQST20 = 1129 328 , H_SPR_FQST21 = 1131, H_SPR_FQST22 = 1133, H_SPR_FQST23 = 1135, H_SPR_FQST24 = 1137 329 , H_SPR_FQST25 = 1139, H_SPR_FQST26 = 1141, H_SPR_FQST27 = 1143, H_SPR_FQST28 = 1145 330 , H_SPR_FQST29 = 1147, H_SPR_FQST30 = 1149, H_SPR_FQST31 = 1151, H_SPR_MCILR0 = 1272 331 , H_SPR_MCILR1 = 1273, H_SPR_MSR0 = 1280, H_SPR_MSR1 = 1281, H_SPR_MSR2 = 1282 332 , H_SPR_MSR3 = 1283, H_SPR_MSR4 = 1284, H_SPR_MSR5 = 1285, H_SPR_MSR6 = 1286 333 , H_SPR_MSR7 = 1287, H_SPR_MSR8 = 1288, H_SPR_MSR9 = 1289, H_SPR_MSR10 = 1290 334 , H_SPR_MSR11 = 1291, H_SPR_MSR12 = 1292, H_SPR_MSR13 = 1293, H_SPR_MSR14 = 1294 335 , H_SPR_MSR15 = 1295, H_SPR_MSR16 = 1296, H_SPR_MSR17 = 1297, H_SPR_MSR18 = 1298 336 , H_SPR_MSR19 = 1299, H_SPR_MSR20 = 1300, H_SPR_MSR21 = 1301, H_SPR_MSR22 = 1302 337 , H_SPR_MSR23 = 1303, H_SPR_MSR24 = 1304, H_SPR_MSR25 = 1305, H_SPR_MSR26 = 1306 338 , H_SPR_MSR27 = 1307, H_SPR_MSR28 = 1308, H_SPR_MSR29 = 1309, H_SPR_MSR30 = 1310 339 , H_SPR_MSR31 = 1311, H_SPR_MSR32 = 1312, H_SPR_MSR33 = 1313, H_SPR_MSR34 = 1314 340 , H_SPR_MSR35 = 1315, H_SPR_MSR36 = 1316, H_SPR_MSR37 = 1317, H_SPR_MSR38 = 1318 341 , H_SPR_MSR39 = 1319, H_SPR_MSR40 = 1320, H_SPR_MSR41 = 1321, H_SPR_MSR42 = 1322 342 , H_SPR_MSR43 = 1323, H_SPR_MSR44 = 1324, H_SPR_MSR45 = 1325, H_SPR_MSR46 = 1326 343 , H_SPR_MSR47 = 1327, H_SPR_MSR48 = 1328, H_SPR_MSR49 = 1329, H_SPR_MSR50 = 1330 344 , H_SPR_MSR51 = 1331, H_SPR_MSR52 = 1332, H_SPR_MSR53 = 1333, H_SPR_MSR54 = 1334 345 , H_SPR_MSR55 = 1335, H_SPR_MSR56 = 1336, H_SPR_MSR57 = 1337, H_SPR_MSR58 = 1338 346 , H_SPR_MSR59 = 1339, H_SPR_MSR60 = 1340, H_SPR_MSR61 = 1341, H_SPR_MSR62 = 1342 347 , H_SPR_MSR63 = 1343, H_SPR_MQOP0 = 1344, H_SPR_MQOP1 = 1346, H_SPR_MQOP2 = 1348 348 , H_SPR_MQOP3 = 1350, H_SPR_MQOP4 = 1352, H_SPR_MQOP5 = 1354, H_SPR_MQOP6 = 1356 349 , H_SPR_MQOP7 = 1358, H_SPR_MQOP8 = 1360, H_SPR_MQOP9 = 1362, H_SPR_MQOP10 = 1364 350 , H_SPR_MQOP11 = 1366, H_SPR_MQOP12 = 1368, H_SPR_MQOP13 = 1370, H_SPR_MQOP14 = 1372 351 , H_SPR_MQOP15 = 1374, H_SPR_MQOP16 = 1376, H_SPR_MQOP17 = 1378, H_SPR_MQOP18 = 1380 352 , H_SPR_MQOP19 = 1382, H_SPR_MQOP20 = 1384, H_SPR_MQOP21 = 1386, H_SPR_MQOP22 = 1388 353 , H_SPR_MQOP23 = 1390, H_SPR_MQOP24 = 1392, H_SPR_MQOP25 = 1394, H_SPR_MQOP26 = 1396 354 , H_SPR_MQOP27 = 1398, H_SPR_MQOP28 = 1400, H_SPR_MQOP29 = 1402, H_SPR_MQOP30 = 1404 355 , H_SPR_MQOP31 = 1406, H_SPR_MQST0 = 1345, H_SPR_MQST1 = 1347, H_SPR_MQST2 = 1349 356 , H_SPR_MQST3 = 1351, H_SPR_MQST4 = 1353, H_SPR_MQST5 = 1355, H_SPR_MQST6 = 1357 357 , H_SPR_MQST7 = 1359, H_SPR_MQST8 = 1361, H_SPR_MQST9 = 1363, H_SPR_MQST10 = 1365 358 , H_SPR_MQST11 = 1367, H_SPR_MQST12 = 1369, H_SPR_MQST13 = 1371, H_SPR_MQST14 = 1373 359 , H_SPR_MQST15 = 1375, H_SPR_MQST16 = 1377, H_SPR_MQST17 = 1379, H_SPR_MQST18 = 1381 360 , H_SPR_MQST19 = 1383, H_SPR_MQST20 = 1385, H_SPR_MQST21 = 1387, H_SPR_MQST22 = 1389 361 , H_SPR_MQST23 = 1391, H_SPR_MQST24 = 1393, H_SPR_MQST25 = 1395, H_SPR_MQST26 = 1397 362 , H_SPR_MQST27 = 1399, H_SPR_MQST28 = 1401, H_SPR_MQST29 = 1403, H_SPR_MQST30 = 1405 363 , H_SPR_MQST31 = 1407, H_SPR_EAR0 = 1536, H_SPR_EAR1 = 1537, H_SPR_EAR2 = 1538 364 , H_SPR_EAR3 = 1539, H_SPR_EAR4 = 1540, H_SPR_EAR5 = 1541, H_SPR_EAR6 = 1542 365 , H_SPR_EAR7 = 1543, H_SPR_EAR8 = 1544, H_SPR_EAR9 = 1545, H_SPR_EAR10 = 1546 366 , H_SPR_EAR11 = 1547, H_SPR_EAR12 = 1548, H_SPR_EAR13 = 1549, H_SPR_EAR14 = 1550 367 , H_SPR_EAR15 = 1551, H_SPR_EAR16 = 1552, H_SPR_EAR17 = 1553, H_SPR_EAR18 = 1554 368 , H_SPR_EAR19 = 1555, H_SPR_EAR20 = 1556, H_SPR_EAR21 = 1557, H_SPR_EAR22 = 1558 369 , H_SPR_EAR23 = 1559, H_SPR_EAR24 = 1560, H_SPR_EAR25 = 1561, H_SPR_EAR26 = 1562 370 , H_SPR_EAR27 = 1563, H_SPR_EAR28 = 1564, H_SPR_EAR29 = 1565, H_SPR_EAR30 = 1566 371 , H_SPR_EAR31 = 1567, H_SPR_EAR32 = 1568, H_SPR_EAR33 = 1569, H_SPR_EAR34 = 1570 372 , H_SPR_EAR35 = 1571, H_SPR_EAR36 = 1572, H_SPR_EAR37 = 1573, H_SPR_EAR38 = 1574 373 , H_SPR_EAR39 = 1575, H_SPR_EAR40 = 1576, H_SPR_EAR41 = 1577, H_SPR_EAR42 = 1578 374 , H_SPR_EAR43 = 1579, H_SPR_EAR44 = 1580, H_SPR_EAR45 = 1581, H_SPR_EAR46 = 1582 375 , H_SPR_EAR47 = 1583, H_SPR_EAR48 = 1584, H_SPR_EAR49 = 1585, H_SPR_EAR50 = 1586 376 , H_SPR_EAR51 = 1587, H_SPR_EAR52 = 1588, H_SPR_EAR53 = 1589, H_SPR_EAR54 = 1590 377 , H_SPR_EAR55 = 1591, H_SPR_EAR56 = 1592, H_SPR_EAR57 = 1593, H_SPR_EAR58 = 1594 378 , H_SPR_EAR59 = 1595, H_SPR_EAR60 = 1596, H_SPR_EAR61 = 1597, H_SPR_EAR62 = 1598 379 , H_SPR_EAR63 = 1599, H_SPR_EDR0 = 1600, H_SPR_EDR1 = 1601, H_SPR_EDR2 = 1602 380 , H_SPR_EDR3 = 1603, H_SPR_EDR4 = 1604, H_SPR_EDR5 = 1605, H_SPR_EDR6 = 1606 381 , H_SPR_EDR7 = 1607, H_SPR_EDR8 = 1608, H_SPR_EDR9 = 1609, H_SPR_EDR10 = 1610 382 , H_SPR_EDR11 = 1611, H_SPR_EDR12 = 1612, H_SPR_EDR13 = 1613, H_SPR_EDR14 = 1614 383 , H_SPR_EDR15 = 1615, H_SPR_EDR16 = 1616, H_SPR_EDR17 = 1617, H_SPR_EDR18 = 1618 384 , H_SPR_EDR19 = 1619, H_SPR_EDR20 = 1620, H_SPR_EDR21 = 1621, H_SPR_EDR22 = 1622 385 , H_SPR_EDR23 = 1623, H_SPR_EDR24 = 1624, H_SPR_EDR25 = 1625, H_SPR_EDR26 = 1626 386 , H_SPR_EDR27 = 1627, H_SPR_EDR28 = 1628, H_SPR_EDR29 = 1629, H_SPR_EDR30 = 1630 387 , H_SPR_EDR31 = 1631, H_SPR_EDR32 = 1632, H_SPR_EDR33 = 1636, H_SPR_EDR34 = 1634 388 , H_SPR_EDR35 = 1635, H_SPR_EDR36 = 1636, H_SPR_EDR37 = 1637, H_SPR_EDR38 = 1638 389 , H_SPR_EDR39 = 1639, H_SPR_EDR40 = 1640, H_SPR_EDR41 = 1641, H_SPR_EDR42 = 1642 390 , H_SPR_EDR43 = 1643, H_SPR_EDR44 = 1644, H_SPR_EDR45 = 1645, H_SPR_EDR46 = 1646 391 , H_SPR_EDR47 = 1647, H_SPR_EDR48 = 1648, H_SPR_EDR49 = 1649, H_SPR_EDR50 = 1650 392 , H_SPR_EDR51 = 1651, H_SPR_EDR52 = 1652, H_SPR_EDR53 = 1653, H_SPR_EDR54 = 1654 393 , H_SPR_EDR55 = 1655, H_SPR_EDR56 = 1656, H_SPR_EDR57 = 1657, H_SPR_EDR58 = 1658 394 , H_SPR_EDR59 = 1659, H_SPR_EDR60 = 1660, H_SPR_EDR61 = 1661, H_SPR_EDR62 = 1662 395 , H_SPR_EDR63 = 1663, H_SPR_IAMLR0 = 1664, H_SPR_IAMLR1 = 1665, H_SPR_IAMLR2 = 1666 396 , H_SPR_IAMLR3 = 1667, H_SPR_IAMLR4 = 1668, H_SPR_IAMLR5 = 1669, H_SPR_IAMLR6 = 1670 397 , H_SPR_IAMLR7 = 1671, H_SPR_IAMLR8 = 1672, H_SPR_IAMLR9 = 1673, H_SPR_IAMLR10 = 1674 398 , H_SPR_IAMLR11 = 1675, H_SPR_IAMLR12 = 1676, H_SPR_IAMLR13 = 1677, H_SPR_IAMLR14 = 1678 399 , H_SPR_IAMLR15 = 1679, H_SPR_IAMLR16 = 1680, H_SPR_IAMLR17 = 1681, H_SPR_IAMLR18 = 1682 400 , H_SPR_IAMLR19 = 1683, H_SPR_IAMLR20 = 1684, H_SPR_IAMLR21 = 1685, H_SPR_IAMLR22 = 1686 401 , H_SPR_IAMLR23 = 1687, H_SPR_IAMLR24 = 1688, H_SPR_IAMLR25 = 1689, H_SPR_IAMLR26 = 1690 402 , H_SPR_IAMLR27 = 1691, H_SPR_IAMLR28 = 1692, H_SPR_IAMLR29 = 1693, H_SPR_IAMLR30 = 1694 403 , H_SPR_IAMLR31 = 1695, H_SPR_IAMLR32 = 1696, H_SPR_IAMLR33 = 1697, H_SPR_IAMLR34 = 1698 404 , H_SPR_IAMLR35 = 1699, H_SPR_IAMLR36 = 1700, H_SPR_IAMLR37 = 1701, H_SPR_IAMLR38 = 1702 405 , H_SPR_IAMLR39 = 1703, H_SPR_IAMLR40 = 1704, H_SPR_IAMLR41 = 1705, H_SPR_IAMLR42 = 1706 406 , H_SPR_IAMLR43 = 1707, H_SPR_IAMLR44 = 1708, H_SPR_IAMLR45 = 1709, H_SPR_IAMLR46 = 1710 407 , H_SPR_IAMLR47 = 1711, H_SPR_IAMLR48 = 1712, H_SPR_IAMLR49 = 1713, H_SPR_IAMLR50 = 1714 408 , H_SPR_IAMLR51 = 1715, H_SPR_IAMLR52 = 1716, H_SPR_IAMLR53 = 1717, H_SPR_IAMLR54 = 1718 409 , H_SPR_IAMLR55 = 1719, H_SPR_IAMLR56 = 1720, H_SPR_IAMLR57 = 1721, H_SPR_IAMLR58 = 1722 410 , H_SPR_IAMLR59 = 1723, H_SPR_IAMLR60 = 1724, H_SPR_IAMLR61 = 1725, H_SPR_IAMLR62 = 1726 411 , H_SPR_IAMLR63 = 1727, H_SPR_IAMPR0 = 1728, H_SPR_IAMPR1 = 1729, H_SPR_IAMPR2 = 1730 412 , H_SPR_IAMPR3 = 1731, H_SPR_IAMPR4 = 1732, H_SPR_IAMPR5 = 1733, H_SPR_IAMPR6 = 1734 413 , H_SPR_IAMPR7 = 1735, H_SPR_IAMPR8 = 1736, H_SPR_IAMPR9 = 1737, H_SPR_IAMPR10 = 1738 414 , H_SPR_IAMPR11 = 1739, H_SPR_IAMPR12 = 1740, H_SPR_IAMPR13 = 1741, H_SPR_IAMPR14 = 1742 415 , H_SPR_IAMPR15 = 1743, H_SPR_IAMPR16 = 1744, H_SPR_IAMPR17 = 1745, H_SPR_IAMPR18 = 1746 416 , H_SPR_IAMPR19 = 1747, H_SPR_IAMPR20 = 1748, H_SPR_IAMPR21 = 1749, H_SPR_IAMPR22 = 1750 417 , H_SPR_IAMPR23 = 1751, H_SPR_IAMPR24 = 1752, H_SPR_IAMPR25 = 1753, H_SPR_IAMPR26 = 1754 418 , H_SPR_IAMPR27 = 1755, H_SPR_IAMPR28 = 1756, H_SPR_IAMPR29 = 1757, H_SPR_IAMPR30 = 1758 419 , H_SPR_IAMPR31 = 1759, H_SPR_IAMPR32 = 1760, H_SPR_IAMPR33 = 1761, H_SPR_IAMPR34 = 1762 420 , H_SPR_IAMPR35 = 1763, H_SPR_IAMPR36 = 1764, H_SPR_IAMPR37 = 1765, H_SPR_IAMPR38 = 1766 421 , H_SPR_IAMPR39 = 1767, H_SPR_IAMPR40 = 1768, H_SPR_IAMPR41 = 1769, H_SPR_IAMPR42 = 1770 422 , H_SPR_IAMPR43 = 1771, H_SPR_IAMPR44 = 1772, H_SPR_IAMPR45 = 1773, H_SPR_IAMPR46 = 1774 423 , H_SPR_IAMPR47 = 1775, H_SPR_IAMPR48 = 1776, H_SPR_IAMPR49 = 1777, H_SPR_IAMPR50 = 1778 424 , H_SPR_IAMPR51 = 1779, H_SPR_IAMPR52 = 1780, H_SPR_IAMPR53 = 1781, H_SPR_IAMPR54 = 1782 425 , H_SPR_IAMPR55 = 1783, H_SPR_IAMPR56 = 1784, H_SPR_IAMPR57 = 1785, H_SPR_IAMPR58 = 1786 426 , H_SPR_IAMPR59 = 1787, H_SPR_IAMPR60 = 1788, H_SPR_IAMPR61 = 1789, H_SPR_IAMPR62 = 1790 427 , H_SPR_IAMPR63 = 1791, H_SPR_DAMLR0 = 1792, H_SPR_DAMLR1 = 1793, H_SPR_DAMLR2 = 1794 428 , H_SPR_DAMLR3 = 1795, H_SPR_DAMLR4 = 1796, H_SPR_DAMLR5 = 1797, H_SPR_DAMLR6 = 1798 429 , H_SPR_DAMLR7 = 1799, H_SPR_DAMLR8 = 1800, H_SPR_DAMLR9 = 1801, H_SPR_DAMLR10 = 1802 430 , H_SPR_DAMLR11 = 1803, H_SPR_DAMLR12 = 1804, H_SPR_DAMLR13 = 1805, H_SPR_DAMLR14 = 1806 431 , H_SPR_DAMLR15 = 1807, H_SPR_DAMLR16 = 1808, H_SPR_DAMLR17 = 1809, H_SPR_DAMLR18 = 1810 432 , H_SPR_DAMLR19 = 1811, H_SPR_DAMLR20 = 1812, H_SPR_DAMLR21 = 1813, H_SPR_DAMLR22 = 1814 433 , H_SPR_DAMLR23 = 1815, H_SPR_DAMLR24 = 1816, H_SPR_DAMLR25 = 1817, H_SPR_DAMLR26 = 1818 434 , H_SPR_DAMLR27 = 1819, H_SPR_DAMLR28 = 1820, H_SPR_DAMLR29 = 1821, H_SPR_DAMLR30 = 1822 435 , H_SPR_DAMLR31 = 1823, H_SPR_DAMLR32 = 1824, H_SPR_DAMLR33 = 1825, H_SPR_DAMLR34 = 1826 436 , H_SPR_DAMLR35 = 1827, H_SPR_DAMLR36 = 1828, H_SPR_DAMLR37 = 1829, H_SPR_DAMLR38 = 1830 437 , H_SPR_DAMLR39 = 1831, H_SPR_DAMLR40 = 1832, H_SPR_DAMLR41 = 1833, H_SPR_DAMLR42 = 1834 438 , H_SPR_DAMLR43 = 1835, H_SPR_DAMLR44 = 1836, H_SPR_DAMLR45 = 1837, H_SPR_DAMLR46 = 1838 439 , H_SPR_DAMLR47 = 1839, H_SPR_DAMLR48 = 1840, H_SPR_DAMLR49 = 1841, H_SPR_DAMLR50 = 1842 440 , H_SPR_DAMLR51 = 1843, H_SPR_DAMLR52 = 1844, H_SPR_DAMLR53 = 1845, H_SPR_DAMLR54 = 1846 441 , H_SPR_DAMLR55 = 1847, H_SPR_DAMLR56 = 1848, H_SPR_DAMLR57 = 1849, H_SPR_DAMLR58 = 1850 442 , H_SPR_DAMLR59 = 1851, H_SPR_DAMLR60 = 1852, H_SPR_DAMLR61 = 1853, H_SPR_DAMLR62 = 1854 443 , H_SPR_DAMLR63 = 1855, H_SPR_DAMPR0 = 1856, H_SPR_DAMPR1 = 1857, H_SPR_DAMPR2 = 1858 444 , H_SPR_DAMPR3 = 1859, H_SPR_DAMPR4 = 1860, H_SPR_DAMPR5 = 1861, H_SPR_DAMPR6 = 1862 445 , H_SPR_DAMPR7 = 1863, H_SPR_DAMPR8 = 1864, H_SPR_DAMPR9 = 1865, H_SPR_DAMPR10 = 1866 446 , H_SPR_DAMPR11 = 1867, H_SPR_DAMPR12 = 1868, H_SPR_DAMPR13 = 1869, H_SPR_DAMPR14 = 1870 447 , H_SPR_DAMPR15 = 1871, H_SPR_DAMPR16 = 1872, H_SPR_DAMPR17 = 1873, H_SPR_DAMPR18 = 1874 448 , H_SPR_DAMPR19 = 1875, H_SPR_DAMPR20 = 1876, H_SPR_DAMPR21 = 1877, H_SPR_DAMPR22 = 1878 449 , H_SPR_DAMPR23 = 1879, H_SPR_DAMPR24 = 1880, H_SPR_DAMPR25 = 1881, H_SPR_DAMPR26 = 1882 450 , H_SPR_DAMPR27 = 1883, H_SPR_DAMPR28 = 1884, H_SPR_DAMPR29 = 1885, H_SPR_DAMPR30 = 1886 451 , H_SPR_DAMPR31 = 1887, H_SPR_DAMPR32 = 1888, H_SPR_DAMPR33 = 1889, H_SPR_DAMPR34 = 1890 452 , H_SPR_DAMPR35 = 1891, H_SPR_DAMPR36 = 1892, H_SPR_DAMPR37 = 1893, H_SPR_DAMPR38 = 1894 453 , H_SPR_DAMPR39 = 1895, H_SPR_DAMPR40 = 1896, H_SPR_DAMPR41 = 1897, H_SPR_DAMPR42 = 1898 454 , H_SPR_DAMPR43 = 1899, H_SPR_DAMPR44 = 1900, H_SPR_DAMPR45 = 1901, H_SPR_DAMPR46 = 1902 455 , H_SPR_DAMPR47 = 1903, H_SPR_DAMPR48 = 1904, H_SPR_DAMPR49 = 1905, H_SPR_DAMPR50 = 1906 456 , H_SPR_DAMPR51 = 1907, H_SPR_DAMPR52 = 1908, H_SPR_DAMPR53 = 1909, H_SPR_DAMPR54 = 1910 457 , H_SPR_DAMPR55 = 1911, H_SPR_DAMPR56 = 1912, H_SPR_DAMPR57 = 1913, H_SPR_DAMPR58 = 1914 458 , H_SPR_DAMPR59 = 1915, H_SPR_DAMPR60 = 1916, H_SPR_DAMPR61 = 1917, H_SPR_DAMPR62 = 1918 459 , H_SPR_DAMPR63 = 1919, H_SPR_AMCR = 1920, H_SPR_STBAR = 1921, H_SPR_MMCR = 1922 460 , H_SPR_IAMVR1 = 1925, H_SPR_DAMVR1 = 1927, H_SPR_CXNR = 1936, H_SPR_TTBR = 1937 461 , H_SPR_TPLR = 1938, H_SPR_TPPR = 1939, H_SPR_TPXR = 1940, H_SPR_TIMERH = 1952 462 , H_SPR_TIMERL = 1953, H_SPR_TIMERD = 1954, H_SPR_DCR = 2048, H_SPR_BRR = 2049 463 , H_SPR_NMAR = 2050, H_SPR_BTBR = 2051, H_SPR_IBAR0 = 2052, H_SPR_IBAR1 = 2053 464 , H_SPR_IBAR2 = 2054, H_SPR_IBAR3 = 2055, H_SPR_DBAR0 = 2056, H_SPR_DBAR1 = 2057 465 , H_SPR_DBAR2 = 2058, H_SPR_DBAR3 = 2059, H_SPR_DBDR00 = 2060, H_SPR_DBDR01 = 2061 466 , H_SPR_DBDR02 = 2062, H_SPR_DBDR03 = 2063, H_SPR_DBDR10 = 2064, H_SPR_DBDR11 = 2065 467 , H_SPR_DBDR12 = 2066, H_SPR_DBDR13 = 2067, H_SPR_DBDR20 = 2068, H_SPR_DBDR21 = 2069 468 , H_SPR_DBDR22 = 2070, H_SPR_DBDR23 = 2071, H_SPR_DBDR30 = 2072, H_SPR_DBDR31 = 2073 469 , H_SPR_DBDR32 = 2074, H_SPR_DBDR33 = 2075, H_SPR_DBMR00 = 2076, H_SPR_DBMR01 = 2077 470 , H_SPR_DBMR02 = 2078, H_SPR_DBMR03 = 2079, H_SPR_DBMR10 = 2080, H_SPR_DBMR11 = 2081 471 , H_SPR_DBMR12 = 2082, H_SPR_DBMR13 = 2083, H_SPR_DBMR20 = 2084, H_SPR_DBMR21 = 2085 472 , H_SPR_DBMR22 = 2086, H_SPR_DBMR23 = 2087, H_SPR_DBMR30 = 2088, H_SPR_DBMR31 = 2089 473 , H_SPR_DBMR32 = 2090, H_SPR_DBMR33 = 2091, H_SPR_CPCFR = 2092, H_SPR_CPCR = 2093 474 , H_SPR_CPSR = 2094, H_SPR_CPESR0 = 2096, H_SPR_CPESR1 = 2097, H_SPR_CPEMR0 = 2098 475 , H_SPR_CPEMR1 = 2099, H_SPR_IHSR8 = 3848 476 } SPR_NAMES; 477 478 /* Enum declaration for . */ 479 typedef enum accg_names { 480 H_ACCG_ACCG0, H_ACCG_ACCG1, H_ACCG_ACCG2, H_ACCG_ACCG3 481 , H_ACCG_ACCG4, H_ACCG_ACCG5, H_ACCG_ACCG6, H_ACCG_ACCG7 482 , H_ACCG_ACCG8, H_ACCG_ACCG9, H_ACCG_ACCG10, H_ACCG_ACCG11 483 , H_ACCG_ACCG12, H_ACCG_ACCG13, H_ACCG_ACCG14, H_ACCG_ACCG15 484 , H_ACCG_ACCG16, H_ACCG_ACCG17, H_ACCG_ACCG18, H_ACCG_ACCG19 485 , H_ACCG_ACCG20, H_ACCG_ACCG21, H_ACCG_ACCG22, H_ACCG_ACCG23 486 , H_ACCG_ACCG24, H_ACCG_ACCG25, H_ACCG_ACCG26, H_ACCG_ACCG27 487 , H_ACCG_ACCG28, H_ACCG_ACCG29, H_ACCG_ACCG30, H_ACCG_ACCG31 488 , H_ACCG_ACCG32, H_ACCG_ACCG33, H_ACCG_ACCG34, H_ACCG_ACCG35 489 , H_ACCG_ACCG36, H_ACCG_ACCG37, H_ACCG_ACCG38, H_ACCG_ACCG39 490 , H_ACCG_ACCG40, H_ACCG_ACCG41, H_ACCG_ACCG42, H_ACCG_ACCG43 491 , H_ACCG_ACCG44, H_ACCG_ACCG45, H_ACCG_ACCG46, H_ACCG_ACCG47 492 , H_ACCG_ACCG48, H_ACCG_ACCG49, H_ACCG_ACCG50, H_ACCG_ACCG51 493 , H_ACCG_ACCG52, H_ACCG_ACCG53, H_ACCG_ACCG54, H_ACCG_ACCG55 494 , H_ACCG_ACCG56, H_ACCG_ACCG57, H_ACCG_ACCG58, H_ACCG_ACCG59 495 , H_ACCG_ACCG60, H_ACCG_ACCG61, H_ACCG_ACCG62, H_ACCG_ACCG63 496 } ACCG_NAMES; 497 498 /* Enum declaration for . */ 499 typedef enum acc_names { 500 H_ACC40_ACC0, H_ACC40_ACC1, H_ACC40_ACC2, H_ACC40_ACC3 501 , H_ACC40_ACC4, H_ACC40_ACC5, H_ACC40_ACC6, H_ACC40_ACC7 502 , H_ACC40_ACC8, H_ACC40_ACC9, H_ACC40_ACC10, H_ACC40_ACC11 503 , H_ACC40_ACC12, H_ACC40_ACC13, H_ACC40_ACC14, H_ACC40_ACC15 504 , H_ACC40_ACC16, H_ACC40_ACC17, H_ACC40_ACC18, H_ACC40_ACC19 505 , H_ACC40_ACC20, H_ACC40_ACC21, H_ACC40_ACC22, H_ACC40_ACC23 506 , H_ACC40_ACC24, H_ACC40_ACC25, H_ACC40_ACC26, H_ACC40_ACC27 507 , H_ACC40_ACC28, H_ACC40_ACC29, H_ACC40_ACC30, H_ACC40_ACC31 508 , H_ACC40_ACC32, H_ACC40_ACC33, H_ACC40_ACC34, H_ACC40_ACC35 509 , H_ACC40_ACC36, H_ACC40_ACC37, H_ACC40_ACC38, H_ACC40_ACC39 510 , H_ACC40_ACC40, H_ACC40_ACC41, H_ACC40_ACC42, H_ACC40_ACC43 511 , H_ACC40_ACC44, H_ACC40_ACC45, H_ACC40_ACC46, H_ACC40_ACC47 512 , H_ACC40_ACC48, H_ACC40_ACC49, H_ACC40_ACC50, H_ACC40_ACC51 513 , H_ACC40_ACC52, H_ACC40_ACC53, H_ACC40_ACC54, H_ACC40_ACC55 514 , H_ACC40_ACC56, H_ACC40_ACC57, H_ACC40_ACC58, H_ACC40_ACC59 515 , H_ACC40_ACC60, H_ACC40_ACC61, H_ACC40_ACC62, H_ACC40_ACC63 516 } ACC_NAMES; 517 518 /* Enum declaration for . */ 519 typedef enum iacc0_names { 520 H_IACC0_IACC0 521 } IACC0_NAMES; 522 523 /* Enum declaration for . */ 524 typedef enum iccr_names { 525 H_ICCR_ICC0, H_ICCR_ICC1, H_ICCR_ICC2, H_ICCR_ICC3 526 } ICCR_NAMES; 527 528 /* Enum declaration for . */ 529 typedef enum fccr_names { 530 H_FCCR_FCC0, H_FCCR_FCC1, H_FCCR_FCC2, H_FCCR_FCC3 531 } FCCR_NAMES; 532 533 /* Enum declaration for . */ 534 typedef enum cccr_names { 535 H_CCCR_CC0, H_CCCR_CC1, H_CCCR_CC2, H_CCCR_CC3 536 , H_CCCR_CC4, H_CCCR_CC5, H_CCCR_CC6, H_CCCR_CC7 537 } CCCR_NAMES; 538 539 /* Attributes. */ 540 541 /* Enum declaration for machine type selection. */ 542 typedef enum mach_attr { 543 MACH_BASE, MACH_FRV, MACH_FR550, MACH_FR500 544 , MACH_FR450, MACH_FR400, MACH_TOMCAT, MACH_SIMPLE 545 , MACH_MAX 546 } MACH_ATTR; 547 548 /* Enum declaration for instruction set selection. */ 549 typedef enum isa_attr { 550 ISA_FRV, ISA_MAX 551 } ISA_ATTR; 552 553 /* Enum declaration for parallel execution pipeline selection. */ 554 typedef enum unit_attr { 555 UNIT_NIL, UNIT_I0, UNIT_I1, UNIT_I01 556 , UNIT_I2, UNIT_I3, UNIT_IALL, UNIT_FM0 557 , UNIT_FM1, UNIT_FM01, UNIT_FM2, UNIT_FM3 558 , UNIT_FMALL, UNIT_FMLOW, UNIT_B0, UNIT_B1 559 , UNIT_B01, UNIT_C, UNIT_MULT_DIV, UNIT_IACC 560 , UNIT_LOAD, UNIT_STORE, UNIT_SCAN, UNIT_DCPL 561 , UNIT_MDUALACC, UNIT_MDCUTSSI, UNIT_MCLRACC_1, UNIT_NUM_UNITS 562 } UNIT_ATTR; 563 564 /* Enum declaration for fr400 major insn categories. */ 565 typedef enum fr400_major_attr { 566 FR400_MAJOR_NONE, FR400_MAJOR_I_1, FR400_MAJOR_I_2, FR400_MAJOR_I_3 567 , FR400_MAJOR_I_4, FR400_MAJOR_I_5, FR400_MAJOR_B_1, FR400_MAJOR_B_2 568 , FR400_MAJOR_B_3, FR400_MAJOR_B_4, FR400_MAJOR_B_5, FR400_MAJOR_B_6 569 , FR400_MAJOR_C_1, FR400_MAJOR_C_2, FR400_MAJOR_M_1, FR400_MAJOR_M_2 570 } FR400_MAJOR_ATTR; 571 572 /* Enum declaration for fr450 major insn categories. */ 573 typedef enum fr450_major_attr { 574 FR450_MAJOR_NONE, FR450_MAJOR_I_1, FR450_MAJOR_I_2, FR450_MAJOR_I_3 575 , FR450_MAJOR_I_4, FR450_MAJOR_I_5, FR450_MAJOR_B_1, FR450_MAJOR_B_2 576 , FR450_MAJOR_B_3, FR450_MAJOR_B_4, FR450_MAJOR_B_5, FR450_MAJOR_B_6 577 , FR450_MAJOR_C_1, FR450_MAJOR_C_2, FR450_MAJOR_M_1, FR450_MAJOR_M_2 578 , FR450_MAJOR_M_3, FR450_MAJOR_M_4, FR450_MAJOR_M_5, FR450_MAJOR_M_6 579 } FR450_MAJOR_ATTR; 580 581 /* Enum declaration for fr500 major insn categories. */ 582 typedef enum fr500_major_attr { 583 FR500_MAJOR_NONE, FR500_MAJOR_I_1, FR500_MAJOR_I_2, FR500_MAJOR_I_3 584 , FR500_MAJOR_I_4, FR500_MAJOR_I_5, FR500_MAJOR_I_6, FR500_MAJOR_B_1 585 , FR500_MAJOR_B_2, FR500_MAJOR_B_3, FR500_MAJOR_B_4, FR500_MAJOR_B_5 586 , FR500_MAJOR_B_6, FR500_MAJOR_C_1, FR500_MAJOR_C_2, FR500_MAJOR_F_1 587 , FR500_MAJOR_F_2, FR500_MAJOR_F_3, FR500_MAJOR_F_4, FR500_MAJOR_F_5 588 , FR500_MAJOR_F_6, FR500_MAJOR_F_7, FR500_MAJOR_F_8, FR500_MAJOR_M_1 589 , FR500_MAJOR_M_2, FR500_MAJOR_M_3, FR500_MAJOR_M_4, FR500_MAJOR_M_5 590 , FR500_MAJOR_M_6, FR500_MAJOR_M_7, FR500_MAJOR_M_8 591 } FR500_MAJOR_ATTR; 592 593 /* Enum declaration for fr550 major insn categories. */ 594 typedef enum fr550_major_attr { 595 FR550_MAJOR_NONE, FR550_MAJOR_I_1, FR550_MAJOR_I_2, FR550_MAJOR_I_3 596 , FR550_MAJOR_I_4, FR550_MAJOR_I_5, FR550_MAJOR_I_6, FR550_MAJOR_I_7 597 , FR550_MAJOR_I_8, FR550_MAJOR_B_1, FR550_MAJOR_B_2, FR550_MAJOR_B_3 598 , FR550_MAJOR_B_4, FR550_MAJOR_B_5, FR550_MAJOR_B_6, FR550_MAJOR_C_1 599 , FR550_MAJOR_C_2, FR550_MAJOR_F_1, FR550_MAJOR_F_2, FR550_MAJOR_F_3 600 , FR550_MAJOR_F_4, FR550_MAJOR_M_1, FR550_MAJOR_M_2, FR550_MAJOR_M_3 601 , FR550_MAJOR_M_4, FR550_MAJOR_M_5 602 } FR550_MAJOR_ATTR; 603 604 /* Number of architecture variants. */ 605 #define MAX_ISAS 1 606 #define MAX_MACHS ((int) MACH_MAX) 607 608 /* Ifield support. */ 609 610 /* Ifield attribute indices. */ 611 612 /* Enum declaration for cgen_ifld attrs. */ 613 typedef enum cgen_ifld_attr { 614 CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED 615 , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 616 , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS 617 } CGEN_IFLD_ATTR; 618 619 /* Number of non-boolean elements in cgen_ifld_attr. */ 620 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) 621 622 /* cgen_ifld attribute accessor macros. */ 623 #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) 624 #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) 625 #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) 626 #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) 627 #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) 628 #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) 629 #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) 630 631 /* Enum declaration for frv ifield types. */ 632 typedef enum ifield_type { 633 FRV_F_NIL, FRV_F_ANYOF, FRV_F_PACK, FRV_F_OP 634 , FRV_F_OPE1, FRV_F_OPE2, FRV_F_OPE3, FRV_F_OPE4 635 , FRV_F_GRI, FRV_F_GRJ, FRV_F_GRK, FRV_F_FRI 636 , FRV_F_FRJ, FRV_F_FRK, FRV_F_CPRI, FRV_F_CPRJ 637 , FRV_F_CPRK, FRV_F_ACCGI, FRV_F_ACCGK, FRV_F_ACC40SI 638 , FRV_F_ACC40UI, FRV_F_ACC40SK, FRV_F_ACC40UK, FRV_F_CRI 639 , FRV_F_CRJ, FRV_F_CRK, FRV_F_CCI, FRV_F_CRJ_INT 640 , FRV_F_CRJ_FLOAT, FRV_F_ICCI_1, FRV_F_ICCI_2, FRV_F_ICCI_3 641 , FRV_F_FCCI_1, FRV_F_FCCI_2, FRV_F_FCCI_3, FRV_F_FCCK 642 , FRV_F_EIR, FRV_F_S10, FRV_F_S12, FRV_F_D12 643 , FRV_F_U16, FRV_F_S16, FRV_F_S6, FRV_F_S6_1 644 , FRV_F_U6, FRV_F_S5, FRV_F_U12_H, FRV_F_U12_L 645 , FRV_F_U12, FRV_F_INT_CC, FRV_F_FLT_CC, FRV_F_COND 646 , FRV_F_CCOND, FRV_F_HINT, FRV_F_LI, FRV_F_LOCK 647 , FRV_F_DEBUG, FRV_F_A, FRV_F_AE, FRV_F_SPR_H 648 , FRV_F_SPR_L, FRV_F_SPR, FRV_F_LABEL16, FRV_F_LABELH6 649 , FRV_F_LABELL18, FRV_F_LABEL24, FRV_F_LRAE, FRV_F_LRAD 650 , FRV_F_LRAS, FRV_F_TLBPROPX, FRV_F_TLBPRL, FRV_F_ICCI_1_NULL 651 , FRV_F_ICCI_2_NULL, FRV_F_ICCI_3_NULL, FRV_F_FCCI_1_NULL, FRV_F_FCCI_2_NULL 652 , FRV_F_FCCI_3_NULL, FRV_F_RS_NULL, FRV_F_GRI_NULL, FRV_F_GRJ_NULL 653 , FRV_F_GRK_NULL, FRV_F_FRI_NULL, FRV_F_FRJ_NULL, FRV_F_ACCJ_NULL 654 , FRV_F_RD_NULL, FRV_F_COND_NULL, FRV_F_CCOND_NULL, FRV_F_S12_NULL 655 , FRV_F_LABEL16_NULL, FRV_F_MISC_NULL_1, FRV_F_MISC_NULL_2, FRV_F_MISC_NULL_3 656 , FRV_F_MISC_NULL_4, FRV_F_MISC_NULL_5, FRV_F_MISC_NULL_6, FRV_F_MISC_NULL_7 657 , FRV_F_MISC_NULL_8, FRV_F_MISC_NULL_9, FRV_F_MISC_NULL_10, FRV_F_MISC_NULL_11 658 , FRV_F_LRA_NULL, FRV_F_TLBPR_NULL, FRV_F_LI_OFF, FRV_F_LI_ON 659 , FRV_F_RELOC_ANN, FRV_F_MAX 660 } IFIELD_TYPE; 661 662 #define MAX_IFLD ((int) FRV_F_MAX) 663 664 /* Hardware attribute indices. */ 665 666 /* Enum declaration for cgen_hw attrs. */ 667 typedef enum cgen_hw_attr { 668 CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE 669 , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS 670 } CGEN_HW_ATTR; 671 672 /* Number of non-boolean elements in cgen_hw_attr. */ 673 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) 674 675 /* cgen_hw attribute accessor macros. */ 676 #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) 677 #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) 678 #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) 679 #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) 680 #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) 681 682 /* Enum declaration for frv hardware types. */ 683 typedef enum cgen_hw_type { 684 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR 685 , HW_H_IADDR, HW_H_RELOC_ANN, HW_H_PC, HW_H_PSR_IMPLE 686 , HW_H_PSR_VER, HW_H_PSR_ICE, HW_H_PSR_NEM, HW_H_PSR_CM 687 , HW_H_PSR_BE, HW_H_PSR_ESR, HW_H_PSR_EF, HW_H_PSR_EM 688 , HW_H_PSR_PIL, HW_H_PSR_PS, HW_H_PSR_ET, HW_H_PSR_S 689 , HW_H_TBR_TBA, HW_H_TBR_TT, HW_H_BPSR_BS, HW_H_BPSR_BET 690 , HW_H_GR, HW_H_GR_DOUBLE, HW_H_GR_HI, HW_H_GR_LO 691 , HW_H_FR, HW_H_FR_DOUBLE, HW_H_FR_INT, HW_H_FR_HI 692 , HW_H_FR_LO, HW_H_FR_0, HW_H_FR_1, HW_H_FR_2 693 , HW_H_FR_3, HW_H_CPR, HW_H_CPR_DOUBLE, HW_H_SPR 694 , HW_H_ACCG, HW_H_ACC40S, HW_H_ACC40U, HW_H_IACC0 695 , HW_H_ICCR, HW_H_FCCR, HW_H_CCCR, HW_H_PACK 696 , HW_H_HINT_TAKEN, HW_H_HINT_NOT_TAKEN, HW_MAX 697 } CGEN_HW_TYPE; 698 699 #define MAX_HW ((int) HW_MAX) 700 701 /* Operand attribute indices. */ 702 703 /* Enum declaration for cgen_operand attrs. */ 704 typedef enum cgen_operand_attr { 705 CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT 706 , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY 707 , CGEN_OPERAND_HASH_PREFIX, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH 708 , CGEN_OPERAND_END_NBOOLS 709 } CGEN_OPERAND_ATTR; 710 711 /* Number of non-boolean elements in cgen_operand_attr. */ 712 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) 713 714 /* cgen_operand attribute accessor macros. */ 715 #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) 716 #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) 717 #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) 718 #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) 719 #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) 720 #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) 721 #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) 722 #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) 723 #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) 724 #define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0) 725 726 /* Enum declaration for frv operand types. */ 727 typedef enum cgen_operand_type { 728 FRV_OPERAND_PC, FRV_OPERAND_PACK, FRV_OPERAND_GRI, FRV_OPERAND_GRJ 729 , FRV_OPERAND_GRK, FRV_OPERAND_GRKHI, FRV_OPERAND_GRKLO, FRV_OPERAND_GRDOUBLEK 730 , FRV_OPERAND_ACC40SI, FRV_OPERAND_ACC40UI, FRV_OPERAND_ACC40SK, FRV_OPERAND_ACC40UK 731 , FRV_OPERAND_ACCGI, FRV_OPERAND_ACCGK, FRV_OPERAND_CPRI, FRV_OPERAND_CPRJ 732 , FRV_OPERAND_CPRK, FRV_OPERAND_CPRDOUBLEK, FRV_OPERAND_FRINTI, FRV_OPERAND_FRINTJ 733 , FRV_OPERAND_FRINTK, FRV_OPERAND_FRI, FRV_OPERAND_FRJ, FRV_OPERAND_FRK 734 , FRV_OPERAND_FRKHI, FRV_OPERAND_FRKLO, FRV_OPERAND_FRDOUBLEI, FRV_OPERAND_FRDOUBLEJ 735 , FRV_OPERAND_FRDOUBLEK, FRV_OPERAND_CRI, FRV_OPERAND_CRJ, FRV_OPERAND_CRJ_INT 736 , FRV_OPERAND_CRJ_FLOAT, FRV_OPERAND_CRK, FRV_OPERAND_CCI, FRV_OPERAND_ICCI_1 737 , FRV_OPERAND_ICCI_2, FRV_OPERAND_ICCI_3, FRV_OPERAND_FCCI_1, FRV_OPERAND_FCCI_2 738 , FRV_OPERAND_FCCI_3, FRV_OPERAND_FCCK, FRV_OPERAND_EIR, FRV_OPERAND_S10 739 , FRV_OPERAND_U16, FRV_OPERAND_S16, FRV_OPERAND_S6, FRV_OPERAND_S6_1 740 , FRV_OPERAND_U6, FRV_OPERAND_S5, FRV_OPERAND_COND, FRV_OPERAND_CCOND 741 , FRV_OPERAND_HINT, FRV_OPERAND_HINT_TAKEN, FRV_OPERAND_HINT_NOT_TAKEN, FRV_OPERAND_LI 742 , FRV_OPERAND_LOCK, FRV_OPERAND_DEBUG, FRV_OPERAND_AE, FRV_OPERAND_LABEL16 743 , FRV_OPERAND_LRAE, FRV_OPERAND_LRAD, FRV_OPERAND_LRAS, FRV_OPERAND_TLBPROPX 744 , FRV_OPERAND_TLBPRL, FRV_OPERAND_A0, FRV_OPERAND_A1, FRV_OPERAND_FRINTIEVEN 745 , FRV_OPERAND_FRINTJEVEN, FRV_OPERAND_FRINTKEVEN, FRV_OPERAND_D12, FRV_OPERAND_S12 746 , FRV_OPERAND_U12, FRV_OPERAND_SPR, FRV_OPERAND_ULO16, FRV_OPERAND_SLO16 747 , FRV_OPERAND_UHI16, FRV_OPERAND_LABEL24, FRV_OPERAND_PSR_ESR, FRV_OPERAND_PSR_S 748 , FRV_OPERAND_PSR_PS, FRV_OPERAND_PSR_ET, FRV_OPERAND_BPSR_BS, FRV_OPERAND_BPSR_BET 749 , FRV_OPERAND_TBR_TBA, FRV_OPERAND_TBR_TT, FRV_OPERAND_LDANN, FRV_OPERAND_LDDANN 750 , FRV_OPERAND_CALLANN, FRV_OPERAND_MAX 751 } CGEN_OPERAND_TYPE; 752 753 /* Number of operands types. */ 754 #define MAX_OPERANDS 89 755 756 /* Maximum number of operands referenced by any insn. */ 757 #define MAX_OPERAND_INSTANCES 8 758 759 /* Insn attribute indices. */ 760 761 /* Enum declaration for cgen_insn attrs. */ 762 typedef enum cgen_insn_attr { 763 CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI 764 , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED 765 , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_PRIVILEGED, CGEN_INSN_NON_EXCEPTING 766 , CGEN_INSN_CONDITIONAL, CGEN_INSN_FR_ACCESS, CGEN_INSN_PRESERVE_OVF, CGEN_INSN_AUDIO 767 , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_UNIT 768 , CGEN_INSN_FR400_MAJOR, CGEN_INSN_FR450_MAJOR, CGEN_INSN_FR500_MAJOR, CGEN_INSN_FR550_MAJOR 769 , CGEN_INSN_END_NBOOLS 770 } CGEN_INSN_ATTR; 771 772 /* Number of non-boolean elements in cgen_insn_attr. */ 773 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) 774 775 /* cgen_insn attribute accessor macros. */ 776 #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) 777 #define CGEN_ATTR_CGEN_INSN_UNIT_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_UNIT-CGEN_INSN_START_NBOOLS-1].nonbitset) 778 #define CGEN_ATTR_CGEN_INSN_FR400_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR400_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) 779 #define CGEN_ATTR_CGEN_INSN_FR450_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR450_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) 780 #define CGEN_ATTR_CGEN_INSN_FR500_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR500_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) 781 #define CGEN_ATTR_CGEN_INSN_FR550_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR550_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) 782 #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) 783 #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) 784 #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) 785 #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) 786 #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) 787 #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) 788 #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) 789 #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) 790 #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) 791 #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) 792 #define CGEN_ATTR_CGEN_INSN_PRIVILEGED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRIVILEGED)) != 0) 793 #define CGEN_ATTR_CGEN_INSN_NON_EXCEPTING_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NON_EXCEPTING)) != 0) 794 #define CGEN_ATTR_CGEN_INSN_CONDITIONAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_CONDITIONAL)) != 0) 795 #define CGEN_ATTR_CGEN_INSN_FR_ACCESS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_FR_ACCESS)) != 0) 796 #define CGEN_ATTR_CGEN_INSN_PRESERVE_OVF_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRESERVE_OVF)) != 0) 797 #define CGEN_ATTR_CGEN_INSN_AUDIO_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_AUDIO)) != 0) 798 799 /* cgen.h uses things we just defined. */ 800 #include "opcode/cgen.h" 801 802 extern const struct cgen_ifld frv_cgen_ifld_table[]; 803 804 /* Attributes. */ 805 extern const CGEN_ATTR_TABLE frv_cgen_hardware_attr_table[]; 806 extern const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table[]; 807 extern const CGEN_ATTR_TABLE frv_cgen_operand_attr_table[]; 808 extern const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[]; 809 810 /* Hardware decls. */ 811 812 extern CGEN_KEYWORD frv_cgen_opval_gr_names; 813 extern CGEN_KEYWORD frv_cgen_opval_gr_names; 814 extern CGEN_KEYWORD frv_cgen_opval_gr_names; 815 extern CGEN_KEYWORD frv_cgen_opval_gr_names; 816 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 817 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 818 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 819 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 820 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 821 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 822 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 823 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 824 extern CGEN_KEYWORD frv_cgen_opval_fr_names; 825 extern CGEN_KEYWORD frv_cgen_opval_cpr_names; 826 extern CGEN_KEYWORD frv_cgen_opval_cpr_names; 827 extern CGEN_KEYWORD frv_cgen_opval_spr_names; 828 extern CGEN_KEYWORD frv_cgen_opval_accg_names; 829 extern CGEN_KEYWORD frv_cgen_opval_acc_names; 830 extern CGEN_KEYWORD frv_cgen_opval_acc_names; 831 extern CGEN_KEYWORD frv_cgen_opval_iacc0_names; 832 extern CGEN_KEYWORD frv_cgen_opval_iccr_names; 833 extern CGEN_KEYWORD frv_cgen_opval_fccr_names; 834 extern CGEN_KEYWORD frv_cgen_opval_cccr_names; 835 extern CGEN_KEYWORD frv_cgen_opval_h_pack; 836 extern CGEN_KEYWORD frv_cgen_opval_h_hint_taken; 837 extern CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken; 838 839 extern const CGEN_HW_ENTRY frv_cgen_hw_table[]; 840 841 842 843 #endif /* FRV_CPU_H */ 844