1 /* $OpenBSD: kiicvar.h,v 1.3 2013/10/09 17:53:30 mpi Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef KIICVAR_H 30 #define KIICVAR_H 31 32 #include <sys/param.h> 33 #include <sys/device.h> 34 #include <sys/systm.h> 35 #include <sys/rwlock.h> 36 37 #include <dev/i2c/i2cvar.h> 38 39 /* Keywest I2C Register offsets */ 40 #define MODE 0 41 #define CONTROL 1 42 #define STATUS 2 43 #define ISR 3 44 #define IER 4 45 #define ADDR 5 46 #define SUBADDR 6 47 #define DATA 7 48 49 /* MODE */ 50 #define I2C_SPEED 0x03 /* Speed mask */ 51 #define I2C_100kHz 0x00 52 #define I2C_50kHz 0x01 53 #define I2C_25kHz 0x02 54 #define I2C_MODE 0x0c /* Mode mask */ 55 #define I2C_DUMBMODE 0x00 /* Dumb mode */ 56 #define I2C_STDMODE 0x04 /* Standard mode */ 57 #define I2C_STDSUBMODE 0x08 /* Standard mode + sub address */ 58 #define I2C_COMBMODE 0x0c /* Combined mode */ 59 #define I2C_PORT 0xf0 /* Port mask */ 60 #define I2C_BUS1 0x10 /* choose Bus 1 */ 61 62 /* CONTROL */ 63 #define I2C_CT_AAK 0x01 /* Send AAK */ 64 #define I2C_CT_ADDR 0x02 /* Send address(es) */ 65 #define I2C_CT_STOP 0x04 /* Send STOP */ 66 #define I2C_CT_START 0x08 /* Send START */ 67 68 /* STATUS */ 69 #define I2C_ST_BUSY 0x01 /* Busy */ 70 #define I2C_ST_LASTAAK 0x02 /* Last AAK */ 71 #define I2C_ST_LASTRW 0x04 /* Last R/W */ 72 #define I2C_ST_SDA 0x08 /* SDA */ 73 #define I2C_ST_SCL 0x10 /* SCL */ 74 75 /* ISR/IER */ 76 #define I2C_INT_DATA 0x01 /* Data byte sent/received */ 77 #define I2C_INT_ADDR 0x02 /* Address sent */ 78 #define I2C_INT_STOP 0x04 /* STOP condition sent */ 79 #define I2C_INT_START 0x08 /* START condition sent */ 80 81 /* I2C flags */ 82 #define I2C_BUSY 0x01 83 #define I2C_READING 0x02 84 #define I2C_ERROR 0x04 85 86 struct kiic_softc { 87 struct device sc_dev; 88 paddr_t sc_paddr; 89 u_char *sc_reg; 90 int sc_regstep; 91 92 int sc_busnode; 93 uint32_t sc_busport; 94 struct rwlock sc_buslock; 95 struct i2c_controller sc_i2c_tag; 96 97 int sc_flags; 98 u_char *sc_data; 99 u_int sc_resid; 100 }; 101 102 #endif 103