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Searched refs:IS_GEN9_LP (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/gt/
H A Dintel_sseu.c396 intel_sseu_set_info(sseu, IS_GEN9_LP(i915) ? 1 : 3, in gen9_sseu_info_init()
397 IS_GEN9_LP(i915) ? 3 : 4, 8); in gen9_sseu_info_init()
467 !IS_GEN9_LP(i915) && hweight8(sseu->slice_mask) > 1; in gen9_sseu_info_init()
469 IS_GEN9_LP(i915) && intel_sseu_subslice_total(sseu) > 1; in gen9_sseu_info_init()
472 if (IS_GEN9_LP(i915)) { in gen9_sseu_info_init()
H A Dintel_gt_clock_utils.c97 freq = IS_GEN9_LP(uncore->i915) ? 19200000 : 24000000; in gen9_read_clock_frequency()
H A Dintel_gtt.c422 else if (IS_GEN9_LP(i915)) in gtt_write_workarounds()
657 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
H A Dintel_wopcm.c96 if (IS_GEN9_LP(i915)) in context_reserved_size()
H A Dintel_rc6.c514 if (IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(rc6)) { in rc6_supported()
822 if (IS_GEN9_LP(i915)) { in intel_rc6_residency_ns()
H A Dintel_sseu_debugfs.c148 if (IS_GEN9_LP(gt->i915)) { in gen9_sseu_device_status()
H A Dintel_mocs.c550 } else if (IS_GEN9_LP(i915)) { in get_mocs_settings()
H A Dintel_ggtt.c232 if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11) in needs_wc_ggtt_mapping()
1018 if (IS_GEN9_LP(i915) || GRAPHICS_VER(i915) >= 11) in ggtt_probe_common()
H A Dintel_rps.c1095 else if (IS_GEN9_LP(i915)) in intel_rps_read_state_cap()
1127 if (IS_GEN9_LP(i915)) { in __gen6_rps_get_freq_caps()
2275 if (IS_GEN9_LP(i915))
H A Dintel_workarounds.c532 if (IS_GEN9_LP(i915)) in gen9_ctx_workarounds_init()
2572 if (IS_GEN9_LP(i915)) in rcs_engine_wa_init()
/openbsd/sys/dev/pci/drm/i915/soc/
H A Dintel_dram.c669 dram_info->wm_lv_0_adjust_needed = !IS_GEN9_LP(i915); in intel_dram_detect()
677 else if (IS_GEN9_LP(i915)) in intel_dram_detect()
/openbsd/sys/dev/pci/drm/i915/gt/uc/
H A Dintel_guc_fw.c36 if (IS_GEN9_LP(uncore->i915)) in guc_prepare_xfer()
/openbsd/sys/dev/pci/drm/i915/
H A Di915_drv.h779 #define IS_GEN9_LP(i915) (GRAPHICS_VER(i915) == 9 && IS_LP(i915)) macro