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Searched refs:Indexed (Results 1 – 25 of 41) sorted by relevance

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/openbsd/gnu/gcc/gcc/config/rs6000/
H A Dconstraints.md119 "Indexed or word-aligned displacement memory operand"
123 "Indexed or indirect memory operand"
129 "Indexed or indirect address operand"
/openbsd/gnu/llvm/llvm/lib/FuzzMutate/
H A DOperations.cpp256 Type *Indexed = ExtractValueInst::getIndexedType(Cur[0]->getType(), in validInsertValueIndex() local
258 return Indexed == Cur[1]->getType(); in validInsertValueIndex()
267 while (Type *Indexed = ExtractValueInst::getIndexedType(BaseTy, I)) { in validInsertValueIndex() local
268 if (Indexed == Cur[1]->getType()) in validInsertValueIndex()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt19 - Vector Extract Unsigned Byte Left/Right-Indexed:
22 // Left-Indexed
27 // Right-Indexed
503 - Load/Store Vector Indexed: lxvx stxvx
527 - Load as Integer Byte/Halfword & Zero Indexed: lxsibzx lxsihzx
535 - Store as Integer Byte/Halfword Indexed: stxsibx stxsihx
543 - Load Vector Halfword*8/Byte*16 Indexed: lxvh8x lxvb16x
553 - Store Vector Halfword*8/Byte*16 Indexed: stxvh8x stxvb16x
571 - Load Vector Word & Splat Indexed: lxvwsx
H A DPPCScheduleP8.td158 // Update-Indexed form loads/stores are no longer first and last in the
H A DPPCInstrP10.td2314 // Indexed vector insert element
2348 // Indexed vector insert element
2361 // Indexed vector insert element
H A DPPCInstrVSX.td1678 // Load as Integer Byte/Halfword & Zero Indexed
1684 // Load Vector Halfword*8/Byte*16 Indexed
1688 // Load Vector Indexed
1699 // Load Vector Word & Splat Indexed
1716 // Store as Integer Byte/Halfword Indexed
1726 // Store Vector Halfword*8/Byte*16 Indexed
1730 // Store Vector Indexed
/openbsd/usr.bin/file/magdir/
H A Dgimp22 >22 belong 2 Indexed Color
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp5633 else if (kind == FMAInstKind::Indexed) in genFusedMultiply()
5745 FMAInstKind::Indexed); in genFusedMultiplyIdx()
6360 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6366 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6373 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6379 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6386 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6398 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6438 FMAInstKind::Indexed); in genAlternativeCodeSequence()
6450 FMAInstKind::Indexed); in genAlternativeCodeSequence()
[all …]
H A DSVEInstrFormats.td2194 // SVE Floating Point Multiply-Add - Indexed Group
2260 // SVE Floating Point Multiply - Indexed Group
2361 // SVE Floating Point Complex Multiply-Add - Indexed Group
2534 // SVE2 Floating Point Widening Multiply-Add - Indexed Group
3092 // SVE2 Integer Multiply-Add - Indexed Group
3142 // SVE2 Integer Multiply-Add Long - Indexed Group
3201 // SVE Integer Dot Product Group - Indexed Group
3299 // SVE2 Complex Integer Dot Product - Indexed Group
3347 // SVE2 Complex Multiply-Add - Indexed Group
3419 // SVE2 Integer Multiply - Indexed Group
[all …]
/openbsd/gnu/usr.bin/binutils/gas/doc/
H A Dc-m68hc11.texi172 @item Constant Offset Indexed Addressing Mode
183 @item Offset Indexed Indirect
H A Dc-z8k.texi120 Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
/openbsd/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-m68hc11.texi172 @item Constant Offset Indexed Addressing Mode
183 @item Offset Indexed Indirect
H A Dc-z8k.texi121 Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8046 bool Indexed = AM != ISD::UNINDEXED; in getLoad() local
8049 SDVTList VTs = Indexed ? in getLoad()
8302 bool Indexed = AM != ISD::UNINDEXED; in getLoadVP() local
8396 bool Indexed = AM != ISD::UNINDEXED; in getStoreVP() local
8398 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other) in getStoreVP()
8553 bool Indexed = AM != ISD::UNINDEXED; in getStridedLoadVP() local
8650 bool Indexed = AM != ISD::UNINDEXED; in getStridedStoreVP() local
8872 bool Indexed = AM != ISD::UNINDEXED; in getMaskedLoad() local
8873 assert((Indexed || Offset.isUndef()) && in getMaskedLoad()
8920 bool Indexed = AM != ISD::UNINDEXED; in getMaskedStore() local
[all …]
/openbsd/gnu/gcc/gcc/config/mips/
H A Dsb1.md146 ;; Indexed loads can only execute on LS1 pipe.
182 ;; Indexed stores can only execute on LS1 pipe.
H A Dmips-dsp.md1009 ;; Table 2-7. MIPS DSP ASE Instructions: Indexed-Load
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVScheduleV.td132 // 7.6. Vector Indexed Instructions
373 // 7.6. Vector Indexed Instructions
H A DRISCVInstrInfoV.td174 // Indexed Segment Loads and Stores
1057 // Vector Indexed Instructions
1705 // Vector Indexed Instructions
1750 // Vector Indexed Segment Instructions
/openbsd/gnu/llvm/llvm/lib/Target/ARC/
H A DARCInstrFormats.td712 // Indexed Jump or Execute.
H A DARCInstrInfo.td603 // Indexed Jump or Execute.
/openbsd/gnu/llvm/llvm/include/llvm/ProfileData/
H A DInstrProfData.inc652 /* Indexed profile format version (start from 1). */
/openbsd/gnu/llvm/compiler-rt/include/profile/
H A DInstrProfData.inc652 /* Indexed profile format version (start from 1). */
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td623 // Indexed loads and stores.
/openbsd/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.td675 // Indexed, indirect register and indirect autoincrement modes
/openbsd/gnu/llvm/llvm/docs/
H A DWritingAnLLVMBackend.rst1404 * ``setIndexedLoadAction`` --- Indexed load.
1405 * ``setIndexedStoreAction`` --- Indexed store.

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