Searched refs:InputVT (Results 1 – 3 of 3) sorted by relevance
| /openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3869 EVT InputVT = LHS.getValueType(); in getSETCCInGPR() local
3870 if (InputVT != MVT::i32 && InputVT != MVT::i64) in getSETCCInGPR()
3875 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
3877 bool Inputs32Bit = InputVT == MVT::i32; in getSETCCInGPR()
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 18569 SDValue InputVT = DAG.getValueType(DataVT); in performST1Combine() local
18572 InputVT = DAG.getValueType(HwSrcVt); in performST1Combine()
18584 InputVT in performST1Combine()
20909 SDValue InputVT = DAG.getValueType(SrcVT); in performScatterStoreCombine() local
20911 InputVT = DAG.getValueType(HwSrcVt); in performScatterStoreCombine()
20926 InputVT}; in performScatterStoreCombine()
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| /openbsd/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 14343 MVT InputVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits), NumElements); in lowerShuffleAsSpecificZeroOrAnyExtend() local
14344 SDValue Ext = AnyExt ? DAG.getUNDEF(InputVT) in lowerShuffleAsSpecificZeroOrAnyExtend()
14345 : getZeroVector(InputVT, Subtarget, DAG, DL); in lowerShuffleAsSpecificZeroOrAnyExtend()
14346 InputV = DAG.getBitcast(InputVT, InputV); in lowerShuffleAsSpecificZeroOrAnyExtend()
14347 InputV = DAG.getNode(UnpackLoHi, DL, InputVT, InputV, Ext); in lowerShuffleAsSpecificZeroOrAnyExtend()
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