| /openbsd/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | LoopPassManager.cpp | 231 LoopStandardAnalysisResults LAR = {AM.getResult<AAManager>(F), in run() local
269 PI.pushBeforeNonSkippedPassCallback([&LAR, &LI](StringRef PassID, Any IR) { in run()
281 assert(L->isRecursivelyLCSSAForm(LAR.DT, LI) && in run()
305 PreservedAnalyses PassPA = Pass->run(*L, LAM, LAR, Updater); in run()
313 if (LAR.MSSA && !PassPA.getChecker<MemorySSAAnalysis>().preserved()) in run()
320 LAR.DT.verify(); in run()
322 LAR.LI.verify(LAR.DT); in run()
324 LAR.SE.verify(); in run()
325 if (LAR.MSSA && VerifyMemorySSA) in run()
326 LAR.MSSA->verifyMemorySSA(); in run()
|
| H A D | LoopVersioningLICM.cpp | 637 LoopStandardAnalysisResults &LAR, in run() argument
639 AliasAnalysis *AA = &LAR.AA; in run()
640 ScalarEvolution *SE = &LAR.SE; in run()
641 DominatorTree *DT = &LAR.DT; in run()
645 LoopAccessInfoManager LAIs(*SE, *AA, *DT, LAR.LI, nullptr); in run()
646 if (!LoopVersioningLICM(AA, SE, &ORE, LAIs, LAR.LI, &L).run(DT)) in run()
|
| /openbsd/gnu/llvm/llvm/include/llvm/Transforms/Scalar/ |
| H A D | LoopVersioningLICM.h | 22 LoopStandardAnalysisResults &LAR, LPMUpdater &U);
|
| /openbsd/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.cpp | 920 const OptimizationRemarkAnalysis *LAR = LAI->getReport(); in canVectorizeMemory() local
921 if (LAR) { in canVectorizeMemory()
924 "loop not vectorized: ", *LAR); in canVectorizeMemory()
|
| /openbsd/gnu/llvm/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 11913 const auto *LAR = cast<SCEVAddRecExpr>(Less); in computeConstantDifference() local
11916 if (LAR->getLoop() != MAR->getLoop()) in computeConstantDifference()
11921 if (!LAR->isAffine() || !MAR->isAffine()) in computeConstantDifference()
11927 Less = LAR->getStart(); in computeConstantDifference()
12283 const SCEVAddRecExpr *LAR = dyn_cast<SCEVAddRecExpr>(LHS); in IsKnownPredicateViaAddRecStart() local
12284 if (!LAR) in IsKnownPredicateViaAddRecStart()
12289 if (LAR->getLoop() != RAR->getLoop()) in IsKnownPredicateViaAddRecStart()
12291 if (!LAR->isAffine() || !RAR->isAffine()) in IsKnownPredicateViaAddRecStart()
12294 if (LAR->getStepRecurrence(SE) != RAR->getStepRecurrence(SE)) in IsKnownPredicateViaAddRecStart()
12299 if (!LAR->getNoWrapFlags(NW) || !RAR->getNoWrapFlags(NW)) in IsKnownPredicateViaAddRecStart()
[all …]
|
| /openbsd/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86SchedBroadwell.td | 1196 def: InstRW<[BWWriteResGroup113], (instregex "LAR(16|32|64)rm",
1277 def: InstRW<[BWWriteResGroup144], (instregex "LAR(16|32|64)rr")>;
|
| H A D | X86SchedSkylakeClient.td | 924 def: InstRW<[SKLWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
1279 def: InstRW<[SKLWriteResGroup131], (instregex "LAR(16|32|64)rm",
|
| H A D | X86SchedHaswell.td | 1384 def: InstRW<[HWWriteResGroup83], (instregex "LAR(16|32|64)rr")>;
1391 def: InstRW<[HWWriteResGroup87], (instregex "LAR(16|32|64)rm",
|
| H A D | X86SchedSkylakeServer.td | 1036 def: InstRW<[SKXWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
1737 def: InstRW<[SKXWriteResGroup146], (instregex "LAR(16|32|64)rm",
|
| H A D | X86SchedIceLake.td | 1054 def: InstRW<[ICXWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
1756 def: InstRW<[ICXWriteResGroup146], (instregex "LAR(16|32|64)rm",
|
| H A D | X86ScheduleBdVer2.td | 314 def : InstRW<[PdWriteLARrr], (instregex "LAR(16|32|64)rr",
|
| H A D | X86SchedAlderlakeP.td | 1152 def : InstRW<[ADLPWriteResGroup90], (instregex "^LAR(32|64)rr$")>;
|
| /openbsd/share/misc/ |
| H A D | airport | 942 LAR:General Brees Field, Laramie, Wyoming, USA
|