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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7616 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK 0x00020000L macro
H A Ddce_8_0_sh_mask.h3191 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK 0x20000 macro
H A Ddce_10_0_sh_mask.h3113 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK 0x20000 macro
H A Ddce_11_0_sh_mask.h3183 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK 0x20000 macro
H A Ddce_11_2_sh_mask.h3431 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK 0x20000 macro
H A Ddce_12_0_sh_mask.h9264 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21261 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
H A Ddcn_1_0_sh_mask.h40015 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43249 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42531 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48758 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49127 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_OVRD_MASK … macro