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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7623 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h3177 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h3099 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h3169 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h3417 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h9257 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21254 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
H A Ddcn_1_0_sh_mask.h40008 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
H A Ddcn_2_1_0_sh_mask.h43242 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
H A Ddcn_3_0_2_sh_mask.h42524 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
H A Ddcn_2_0_0_sh_mask.h48751 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro
H A Ddcn_3_0_0_sh_mask.h49120 #define LVTMA_PWRSEQ_CNTL__LVTMA_PWRSEQ_EN_MASK macro