Searched refs:LoadedVT (Results 1 – 7 of 7) sorted by relevance
1596 EVT LoadedVT = LD->getMemoryVT(); in tryARMIndexedLoad() local1609 } else if (LoadedVT == MVT::i32 && in tryARMIndexedLoad()1614 } else if (LoadedVT == MVT::i16 && in tryARMIndexedLoad()1620 } else if (LoadedVT == MVT::i8 || LoadedVT == MVT::i1) { in tryARMIndexedLoad()1671 EVT LoadedVT = LD->getMemoryVT(); in tryT1IndexedLoad() local1702 EVT LoadedVT = LD->getMemoryVT(); in tryT2IndexedLoad() local1748 EVT LoadedVT; in tryMVEIndexedLoad() local1760 LoadedVT = LD->getMemoryVT(); in tryMVEIndexedLoad()1761 if (!LoadedVT.isVector()) in tryMVEIndexedLoad()1776 LoadedVT = LD->getMemoryVT(); in tryMVEIndexedLoad()[all …]
867 EVT LoadedVT = LD->getMemoryVT(); in tryLoad() local874 if (!LoadedVT.isSimple()) in tryLoad()909 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoad()918 assert((LoadedVT == MVT::v2f16 || LoadedVT == MVT::v2bf16) && in tryLoad()1017 EVT LoadedVT = MemSD->getMemoryVT(); in tryLoadVector() local1019 if (!LoadedVT.isSimple()) in tryLoadVector()1040 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoadVector()
76 EVT LoadedVT = LD->getMemoryVT(); in INITIALIZE_PASS() local83 bool IsValidInc = HII->isValidAutoIncImm(LoadedVT, Inc); in INITIALIZE_PASS()85 assert(LoadedVT.isSimple()); in INITIALIZE_PASS()86 switch (LoadedVT.getSimpleVT().SimpleTy) { in INITIALIZE_PASS()157 assert(LoadedVT.getSizeInBits() <= 32); in INITIALIZE_PASS()
272 EVT LoadedVT = LD->getMemoryVT(); in LegalizeOp() local273 if (LoadedVT.isVector() && ExtType != ISD::NON_EXTLOAD) in LegalizeOp()274 Action = TLI.getLoadExtAction(ExtType, LD->getValueType(0), LoadedVT); in LegalizeOp()
9042 EVT LoadedVT = LD->getMemoryVT(); in expandUnalignedLoad() local9047 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in expandUnalignedLoad()9048 if (isTypeLegal(intVT) && isTypeLegal(LoadedVT)) { in expandUnalignedLoad()9050 LoadedVT.isVector()) { in expandUnalignedLoad()9059 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in expandUnalignedLoad()9060 if (LoadedVT != VT) in expandUnalignedLoad()9070 unsigned LoadedBytes = LoadedVT.getStoreSize(); in expandUnalignedLoad()9075 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT); in expandUnalignedLoad()9126 LoadedVT); in expandUnalignedLoad()9132 assert(LoadedVT.isInteger() && !LoadedVT.isVector() && in expandUnalignedLoad()[all …]
5740 EVT LoadedVT = LoadN->getMemoryVT(); in isAndLoadExtLoad() local5742 if (ExtVT == LoadedVT && in isAndLoadExtLoad()5756 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
5373 EVT LoadedVT = LD->getMemoryVT(); in Select() local5392 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5393 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5404 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5405 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5429 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5430 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5441 assert((!isSExt || LoadedVT == MVT::i16 || LoadedVT == MVT::i32) && in Select()5443 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()