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Searched refs:MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_sh_mask.h2658 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_2_3_0_sh_mask.h2999 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_9_1_sh_mask.h3188 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_1_0_sh_mask.h3736 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_9_3_0_sh_mask.h3744 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_1_8_0_sh_mask.h9156 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_1_7_sh_mask.h11121 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro
H A Dmmhub_9_4_1_sh_mask.h8772 #define MMEA0_DRAM_WR_PRI_QUANT_PRI2__GROUP3_THRESHOLD__SHIFT macro