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Searched refs:MPLL_CONTROL__DQ_0_0_PLL_PWRON__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h11327 #define MPLL_CONTROL__DQ_0_0_PLL_PWRON__SHIFT 0x00000011 macro
H A Dgmc_7_1_sh_mask.h9564 #define MPLL_CONTROL__DQ_0_0_PLL_PWRON__SHIFT 0x11 macro
H A Dgmc_8_1_sh_mask.h10478 #define MPLL_CONTROL__DQ_0_0_PLL_PWRON__SHIFT 0x11 macro